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authorStefan Reinauer <stepan@coresystems.de>2010-01-17 14:08:17 +0000
committerStefan Reinauer <stepan@openbios.org>2010-01-17 14:08:17 +0000
commit838c5a5d8019eff857dac21c24a2bca624fa3152 (patch)
treed68ad964ea497ddeae64f700cf2f06298a732f63 /targets/roda
parentf6eb88adfb8535cdd6c71d5adeed6ca8ed78952d (diff)
Add support for the Roda RK886EX a.k.a Rocky III+ ruggedised notebook
http://www.roda-computer.com/en/products/notebooks/rocky-iii-rk886ex.html Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5031 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets/roda')
-rw-r--r--targets/roda/rk886ex/Config-abuild.lb29
-rw-r--r--targets/roda/rk886ex/Config.lb22
2 files changed, 51 insertions, 0 deletions
diff --git a/targets/roda/rk886ex/Config-abuild.lb b/targets/roda/rk886ex/Config-abuild.lb
new file mode 100644
index 0000000000..bb84632592
--- /dev/null
+++ b/targets/roda/rk886ex/Config-abuild.lb
@@ -0,0 +1,29 @@
+# This will make a target directory of ./VENDOR_MAINBOARD
+
+target VENDOR_MAINBOARD
+mainboard VENDOR/MAINBOARD
+
+option CC="CROSSCC"
+option CONFIG_CROSS_COMPILE="CROSS_PREFIX"
+option HOSTCC="CROSS_HOSTCC"
+
+__COMPRESSION__
+__LOGLEVEL__
+
+option CONFIG_ROM_SIZE=1024*1024
+
+romimage "normal"
+ option CONFIG_USE_FALLBACK_IMAGE=0
+ option COREBOOT_EXTRA_VERSION=".0-normal"
+ payload __PAYLOAD__
+end
+
+romimage "fallback"
+ option CONFIG_USE_FALLBACK_IMAGE=1
+ option COREBOOT_EXTRA_VERSION=".0-fallback"
+ payload __PAYLOAD__
+end
+
+buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback"
+#pci_rom ../../../misc/roda-pci8086,27a2.rom vendor_id=0x8086 device_id=0x27a2
+
diff --git a/targets/roda/rk886ex/Config.lb b/targets/roda/rk886ex/Config.lb
new file mode 100644
index 0000000000..309bcd6655
--- /dev/null
+++ b/targets/roda/rk886ex/Config.lb
@@ -0,0 +1,22 @@
+target roda_rk886ex
+mainboard roda_rk886ex
+
+## CONFIG_ROM_SIZE is the total number of bytes allocated for coreboot use
+## (normal AND fallback images and payloads).
+option CONFIG_ROM_SIZE = 1024*1024
+
+## CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image,
+## not including any payload.
+option CONFIG_ROM_IMAGE_SIZE = 0x26000
+
+## FALLBACK_SIZE is the amount of the ROM the complete fallback image
+## (including payload) will use
+option CONFIG_FALLBACK_SIZE = ROM_SIZE
+
+romimage "fallback"
+ option CONFIG_USE_FALLBACK_IMAGE=1
+ #payload $(HOME)/filo.elf
+ payload /dev/zero
+end
+
+buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback"