diff options
| author | Greg Watson <jarrah@users.sourceforge.net> | 2003-06-23 01:02:54 +0000 |
|---|---|---|
| committer | Greg Watson <jarrah@users.sourceforge.net> | 2003-06-23 01:02:54 +0000 |
| commit | 5808bac56843a81fe613217e8e5f8f884eab3d65 (patch) | |
| tree | 6dd30a98cb65aea994a36d19bce9202d85c3b6dd /targets/motorola | |
| parent | 4890a666a9fa9a052d2369bd85566b3f545382a3 (diff) | |
Sandpoint configuration file.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@889 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets/motorola')
| -rw-r--r-- | targets/motorola/sandpoint/Config.lb | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/targets/motorola/sandpoint/Config.lb b/targets/motorola/sandpoint/Config.lb new file mode 100644 index 0000000000..a1fdd2a86e --- /dev/null +++ b/targets/motorola/sandpoint/Config.lb @@ -0,0 +1,75 @@ +# Sample config file for Motorola Sandpoint X3 Demo Board with +# the Altimus mpc7410 PMC card +# This will make a target directory of ./sandpoint + +loadoptions + +target sandpoint + +uses ARCH CROSS_COMPILE HAVE_OPTION_TABLE +uses CONFIG_COMPRESS NO_POST +uses CONFIG_IDE_STREAM IDE_BOOT_DRIVE +uses USE_ELF_BOOT IDE_SWAB IDE_OFFSET +uses ROM_SIZE ROM_IMAGE_SIZE ROM_SECTION_SIZE ROM_SECTION_OFFSET _ROMBASE +uses CACHE_RAM_BASE CACHE_RAM_SIZE STACK_SIZE HEAP_SIZE +uses MAINBOARD MAINBOARD_PART_NUMBER MAINBOARD_VENDOR + +## use a cross compiler +option CROSS_COMPILE="powerpc-eabi-" + +## We don't use compressed image +option CONFIG_COMPRESS=0 + +## Turn off POST codes +option NO_POST=1 + +## Boot linux from IDE +option CONFIG_IDE_STREAM=1 +option IDE_BOOT_DRIVE=0 +option USE_ELF_BOOT=1 +option IDE_SWAB=1 +option IDE_OFFSET=0 + +option ROM_SIZE=1048576 + +## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. +option ROM_IMAGE_SIZE=49152 + +## LinuxBIOS C code runs at this location in RAM +option _RAMBASE=0x00100000 + +## For the trick of using cache as ram +## put the fake ram location at this address +option CACHE_RAM_BASE=0x00200000 +option CACHE_RAM_SIZE=0x00004000 + +## +## Use a 64K stack +## +option STACK_SIZE=0x10000 + +## +## Use a 64K heap +## +option HEAP_SIZE=0x10000 + +## Compute the location and size of where this firmware image +## (linuxBIOS plus bootloader) will live in the boot rom chip. +## +option ROM_SECTION_SIZE=ROM_SIZE +option ROM_SECTION_OFFSET=0 + +## +## Compute where this copy of linuxBIOS will start in the boot rom +## +option _ROMBASE=0xfff00000 + +# Sandpoint Demo Board +mainboard motorola/sandpoint + arch ppc end + pmc altimus/mpc7410 end + + addaction linuxbios.a "$(CROSS_COMPILE)ranlib linuxbios.a" + + makedefine CFLAGS += -g +end |