diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2009-06-30 15:17:49 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-06-30 15:17:49 +0000 |
| commit | 0867062412dd4bfe5a556e5f3fd85ba5b682d79b (patch) | |
| tree | 81ca5db12b8567b48daaa23a541bfb8a5dc011f8 /targets/jetway | |
| parent | 9702b6bf7ec5a4fb16934f1cf2724480e2460c89 (diff) | |
This patch unifies the use of config options in v2 to all start with CONFIG_
It's basically done with the following script and some manual fixup:
VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets/jetway')
| -rw-r--r-- | targets/jetway/j7f24/Config-abuild.lb | 12 | ||||
| -rw-r--r-- | targets/jetway/j7f24/Config.lb | 12 |
2 files changed, 12 insertions, 12 deletions
diff --git a/targets/jetway/j7f24/Config-abuild.lb b/targets/jetway/j7f24/Config-abuild.lb index d364cb7cbd..2a65acae0d 100644 --- a/targets/jetway/j7f24/Config-abuild.lb +++ b/targets/jetway/j7f24/Config-abuild.lb @@ -4,18 +4,18 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/jetway/j7f24/Config.lb b/targets/jetway/j7f24/Config.lb index 268873d07a..52a1108ee3 100644 --- a/targets/jetway/j7f24/Config.lb +++ b/targets/jetway/j7f24/Config.lb @@ -22,24 +22,24 @@ target jetway-j7f24 mainboard jetway/j7f24 -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 # coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 # # If space is allotted for a VGA BIOS, # generate the final ROM like this: # cat vgabios bochsbios coreboot.rom > coreboot.rom.final # -#option ROM_SIZE = (512 * 1024) - (63 * 1024) - (64 * 1024) -option ROM_SIZE = (512 * 1024) +#option CONFIG_ROM_SIZE = (512 * 1024) - (63 * 1024) - (64 * 1024) +option CONFIG_ROM_SIZE = (512 * 1024) romimage "image" option COREBOOT_EXTRA_VERSION = "-j7f24" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" |