Change the CBFS build process to use coreboot.rom

instead of coreboot.strip. That fixes the normal
image because the calculations for its offset in
the ROM match reality again.

This requires changes in CBFS configurations to
minimize the bootblock size. These are also done
for CBFS boards.

Other than this a couple of minor fixes are in this
patch:
- make asus/m2v-mx_se build with abuild with a
  crosscompiler
- move CONFIG_CBFS for hp/dl145_g3 to Options.lb
  as it's done everywhere else
- change the default config of abuild to not
  provide ROM_IMAGE_SIZE values for the images
  in a CBFS configuration
- change abuild's crosscompile autodetection to
  not try to use "i386-elf-i386-elf-gcc" (which
  is bogus)

Except for the latter two abuild changes (both
in util/abuild/abuild), they're available as
patch set on the mailing list in a mail from
2009-06-05 titled
[PATCH]es to get normal image to work again with CBFS

The changes in util/abuild/abuild are trivial and
abuild tested.

As discussed on the list,
targets/hp/dl145_g3/Config-abuild.lb is
deleted, now that Config.lb works again.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 0 insertions, 1 deletions

diff --git a/targets/emulation/qemu-x86/Config.OLPC.lb b/targets/emulation/qemu-x86/Config.OLPC.lb
index de7f0ee587..93c4fb3557 100644
--- a/targets/emulation/qemu-x86/Config.OLPC.lb
+++ b/targets/emulation/qemu-x86/Config.OLPC.lb
@@ -13,7 +13,6 @@ option HAVE_PIRQ_TABLE=1
 option IRQ_SLOT_COUNT=6
 
 romimage "image" 
-	option ROM_IMAGE_SIZE=0x10000
 	option COREBOOT_EXTRA_VERSION="-OpenBIOS"
 	payload /tmp/olpcpayload.elf
 end