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authorRonald G. Minnich <rminnich@gmail.com>2003-12-02 03:58:19 +0000
committerRonald G. Minnich <rminnich@gmail.com>2003-12-02 03:58:19 +0000
commit8aa7bccc9dcc51213f3b15f91f2d4985203f16dd (patch)
tree80524db1dbd56c3a2224e16c5ed4cd794e02091a /targets/amd
parent13f8c07850ef34af891f0cffe287a0209b57f259 (diff)
from Yh Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1302 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets/amd')
-rw-r--r--targets/amd/quartet/Config.lb3
1 files changed, 0 insertions, 3 deletions
diff --git a/targets/amd/quartet/Config.lb b/targets/amd/quartet/Config.lb
index 47c01b2de2..ae89528ad8 100644
--- a/targets/amd/quartet/Config.lb
+++ b/targets/amd/quartet/Config.lb
@@ -48,7 +48,6 @@ uses CONFIG_CHIP_CONFIGURE
uses XIP_ROM_SIZE
uses XIP_ROM_BASE
uses LINUXBIOS_EXTRA_VERSION
-uses FAKE_SPDROM
uses CC
option CC="gcc -m32"
@@ -74,8 +73,6 @@ option HAVE_OPTION_TABLE=1
option CONFIG_ROM_STREAM=1
option HAVE_FALLBACK_BOOT=1
-option FAKE_SPDROM=1
-
###
### Compute the location and size of where this firmware image
### (linuxBIOS plus bootloader) will live in the boot rom chip.