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authorMaggie Li <maggie.li@amd.com>2008-12-09 21:52:42 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-12-09 21:52:42 +0000
commit19ead962c4c0331de6bd9624843f8a80608bff60 (patch)
tree780d657cac482c851f9f3fc0981b757194ca2439 /targets/amd
parent8b643cea5a3cd75f9e7ce456ba0ab4271fba2c1a (diff)
AMD PISTACHIO mainboard support.
The following ACPI features are supported: 1. S1, S4, S5 sleep and wake up (by power button). 2. Thermal configuration based on ADT7475. 3. HPET timer. 4. Interrupt routing based on ACPI table. Signed-off-by: Maggie Li <maggie.li@amd.com> Reviewed-by: Michael Xie <michael.xie@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3808 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets/amd')
-rw-r--r--targets/amd/pistachio/Config-abuild.lb29
-rw-r--r--targets/amd/pistachio/Config.lb21
2 files changed, 50 insertions, 0 deletions
diff --git a/targets/amd/pistachio/Config-abuild.lb b/targets/amd/pistachio/Config-abuild.lb
new file mode 100644
index 0000000000..ebac1d42ab
--- /dev/null
+++ b/targets/amd/pistachio/Config-abuild.lb
@@ -0,0 +1,29 @@
+# This will make a target directory of ./VENDOR_MAINBOARD
+
+target VENDOR_MAINBOARD
+mainboard VENDOR/MAINBOARD
+
+option CC="CROSSCC"
+option CROSS_COMPILE="CROSS_PREFIX"
+option HOSTCC="CROSS_HOSTCC"
+
+__COMPRESSION__
+
+option ROM_SIZE=1024*1024
+romimage "normal"
+ option USE_FALLBACK_IMAGE=0
+ option ROM_IMAGE_SIZE=0x20000
+ option XIP_ROM_SIZE=0x20000
+ option COREBOOT_EXTRA_VERSION=".0-normal"
+ payload __PAYLOAD__
+end
+
+romimage "failover"
+ option USE_FALLBACK_IMAGE=1
+ option ROM_IMAGE_SIZE=0x20000
+ option XIP_ROM_SIZE=0x20000
+ option COREBOOT_EXTRA_VERSION=".0-failover"
+ payload __PAYLOAD__
+end
+
+buildrom ./coreboot.rom ROM_SIZE "normal" "failover"
diff --git a/targets/amd/pistachio/Config.lb b/targets/amd/pistachio/Config.lb
new file mode 100644
index 0000000000..af8e1afa40
--- /dev/null
+++ b/targets/amd/pistachio/Config.lb
@@ -0,0 +1,21 @@
+# This will make a target directory of ./pistachio
+
+target pistachio
+mainboard amd/pistachio
+
+romimage "normal"
+ option ROM_SIZE = 1024*1024 - 55808
+ option USE_FALLBACK_IMAGE=0
+ option ROM_IMAGE_SIZE=0x20000
+ option XIP_ROM_SIZE=0x20000
+ payload ../payload.elf
+end
+
+romimage "fallback"
+ option USE_FALLBACK_IMAGE=1
+ option ROM_IMAGE_SIZE=0x20000
+ option XIP_ROM_SIZE=0x20000
+ payload ../payload.elf
+end
+
+buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"