diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2022-05-26 22:25:03 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-20 12:08:08 +0000 |
| commit | fe97c77cab5f91bef5890257e56a63f8aa027cd8 (patch) | |
| tree | 9d30c4ed847aeca79cc92ef000e7906861d5596f /src | |
| parent | 9d894b856361f6f8978d6c27557f8dd0bd84d2df (diff) | |
mb/starlabs/lite: Enable enhanced C-states
Tested on the StarLite Mk III & Mk IV with Zorin 16.2 Core. This
resulted in a reduction in power consumption of approximately 3%.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I7b5f4e01bc786db02184b722c74fda7d0ca055be
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64709
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/starlabs/lite/variants/glk/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/starlabs/lite/variants/glkr/devicetree.cb | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb index e44896f386..bc878ef796 100644 --- a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb +++ b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb @@ -25,6 +25,8 @@ chip soc/intel/apollolake register "hdaudio_pwr_gate_enable" = "1" register "hdaudio_bios_config_lockdown" = "1" + register "enhanced_cstates" = "1" + register "pnp_settings" = "PNP_PERF_POWER" register "ModPhyIfValue" = "0x12" diff --git a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb index 5cfcb4033d..ca6ce1c6ad 100644 --- a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb +++ b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb @@ -25,6 +25,8 @@ chip soc/intel/apollolake register "hdaudio_pwr_gate_enable" = "1" register "hdaudio_bios_config_lockdown" = "1" + register "enhanced_cstates" = "1" + register "pnp_settings" = "PNP_PERF_POWER" register "ModPhyIfValue" = "0x12" |