summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorFelix Held <felix.held@amd.corp-partner.google.com>2021-10-21 02:19:50 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-10-22 14:59:24 +0000
commitf9146ad569385698ecbf551eb2e022a4c4d80a84 (patch)
treea59e0fbbcac3a56c332c1e73fd0d2f011f4f89da /src
parentaf2da558763ef9ec7a888cdd56b6a536c8299c89 (diff)
soc/amd/cezanne,picasso/chipset.cb: drop LAPIC device
After adding code to handle the case of missing the link/bus on the CPU cluster device in mp_cpu_bus_init, there's no need to have the LAPIC device in the devicetree any more. TEST=Mandolin still boots successfully. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Icfc4fb61b373129f3bf4f4de09c38076a8f66733 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58510 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/cezanne/chipset.cb1
-rw-r--r--src/soc/amd/picasso/chipset.cb1
2 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/amd/cezanne/chipset.cb b/src/soc/amd/cezanne/chipset.cb
index 2c685c3ad2..6ee79ebc9a 100644
--- a/src/soc/amd/cezanne/chipset.cb
+++ b/src/soc/amd/cezanne/chipset.cb
@@ -1,6 +1,5 @@
chip soc/amd/cezanne
device cpu_cluster 0 on
- device lapic 0 on end
end
device domain 0 on
device pci 00.0 alias gnb on end
diff --git a/src/soc/amd/picasso/chipset.cb b/src/soc/amd/picasso/chipset.cb
index 1730f8d95a..dfa5418198 100644
--- a/src/soc/amd/picasso/chipset.cb
+++ b/src/soc/amd/picasso/chipset.cb
@@ -2,7 +2,6 @@
chip soc/amd/picasso
device cpu_cluster 0 on
- device lapic 0 on end
end
device domain 0 on
device pci 00.0 alias gnb on end