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authorBora Guvendik <bora.guvendik@intel.com>2021-09-02 13:23:03 -0700
committerPatrick Georgi <pgeorgi@google.com>2021-11-03 09:33:12 +0000
commitf6f1258673d4c2382e3014904563380c13f4eeec (patch)
tree04f0bdf30ca8ca294e92437ddc4f9026a015b363 /src
parent7e272024417ac33a57424b28b34926c0e7609c51 (diff)
soc/intel/alderlake: Allow devicetree override to leave some VR settings as default
Allow devicetree override to leave ac_loadline, dc_loadline and icc_max as default. Test=Boot to OS Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Change-Id: I715345d5ea83aed9ee929b2a4e13921c9d8895b1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58807 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/alderlake/vr_config.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/soc/intel/alderlake/vr_config.c b/src/soc/intel/alderlake/vr_config.c
index 2180fc5c8f..99caacbc41 100644
--- a/src/soc/intel/alderlake/vr_config.c
+++ b/src/soc/intel/alderlake/vr_config.c
@@ -87,9 +87,12 @@ void fill_vr_domain_config(FSP_S_CONFIG *s_cfg,
if (chip_cfg->vr_config_enable) {
cfg = chip_cfg;
- s_cfg->AcLoadline[domain] = cfg->ac_loadline;
- s_cfg->DcLoadline[domain] = cfg->dc_loadline;
- s_cfg->IccMax[domain] = cfg->icc_max;
+ if (cfg->ac_loadline)
+ s_cfg->AcLoadline[domain] = cfg->ac_loadline;
+ if (cfg->dc_loadline)
+ s_cfg->DcLoadline[domain] = cfg->dc_loadline;
+ if (cfg->icc_max)
+ s_cfg->IccMax[domain] = cfg->icc_max;
s_cfg->TdcTimeWindow[domain] = cfg->tdc_timewindow;
s_cfg->TdcCurrentLimit[domain] = cfg->tdc_currentlimit;
} else {