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authorKevin Chiu <Kevin.Chiu@quantatw.com>2016-11-09 13:48:12 +0800
committerMartin Roth <martinroth@google.com>2016-11-10 16:48:22 +0100
commitf5fb219f0f0d85cee50f7263d9cac6ed4a3413d6 (patch)
tree692a7cff80f46b1378af41e8329baadd37089eaf /src
parent82fcc1afa13e25fd2b151769ea757ae05bdf91f5 (diff)
mainboard/google/pyro: Configure PERST pin
Configure GPIO 122 as PERST. This is to assert WiFi PERST during s0ix entry. BUG=chrome-os-partner:58112 BRANCH=master TEST=emerge-pyro coreboot chromeos-bootimage Change-Id: Id760251a1b037feb62ec43199a145e407b074769 Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com> Reviewed-on: https://review.coreboot.org/17334 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/reef/variants/pyro/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/reef/variants/pyro/devicetree.cb b/src/mainboard/google/reef/variants/pyro/devicetree.cb
index eb2f133dc6..60729ef6d9 100644
--- a/src/mainboard/google/reef/variants/pyro/devicetree.cb
+++ b/src/mainboard/google/reef/variants/pyro/devicetree.cb
@@ -15,7 +15,7 @@ chip soc/intel/apollolake
# GPIO for PERST_0
# If the Board has PERST_0 signal, assign the GPIO
# If the Board does not have PERST_0, assign GPIO_PRT0_UDEF
- register "prt0_gpio" = "GPIO_PRT0_UDEF"
+ register "prt0_gpio" = "GPIO_122"
# EMMC TX DATA Delay 1
# Refer to EDS-Vol2-22.3.