diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2022-10-12 23:14:44 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-10-13 23:57:14 +0000 |
| commit | f2812dfe535d6c9d31f14a7092d15274ec960ead (patch) | |
| tree | a67acbde4efb8db84036aba6c146bc569ba8baa4 /src | |
| parent | 30b3660956936301b750a1c065f0d97ddce14a2b (diff) | |
mb/amd/gardenia,padmelon/devicetree: explicitly enable IOMMU device
PCI devices that aren't present in the devicetree will be treated as
enabled. Since the chipset devicetree that will be added in a follow-up
patch disables this device by default, explicitly enable the IOMMU
device on the Stoneyridge mainboards that don't disable it to keep the
same behavior.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I4a2cdd00abe8309244829dc633dd8a9ca0038dfa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68313
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/amd/gardenia/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/amd/padmelon/devicetree.cb | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/amd/gardenia/devicetree.cb b/src/mainboard/amd/gardenia/devicetree.cb index fc7bde527f..bb90ed43e2 100644 --- a/src/mainboard/amd/gardenia/devicetree.cb +++ b/src/mainboard/amd/gardenia/devicetree.cb @@ -13,6 +13,7 @@ chip soc/amd/stoneyridge device domain 0 on subsystemid 0x1022 0x1410 inherit device pci 0.0 on end # Root Complex + device pci 0.2 on end # IOMMU device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 device pci 1.1 on end # Internal Multimedia device pci 2.0 on end # PCIe Host Bridge diff --git a/src/mainboard/amd/padmelon/devicetree.cb b/src/mainboard/amd/padmelon/devicetree.cb index a80539029e..76e7d08948 100644 --- a/src/mainboard/amd/padmelon/devicetree.cb +++ b/src/mainboard/amd/padmelon/devicetree.cb @@ -10,6 +10,7 @@ chip soc/amd/stoneyridge device domain 0 on subsystemid 0x1022 0x1410 inherit device pci 0.0 on end # Root Complex + device pci 0.2 on end # IOMMU device pci 1.0 on end # Internal Graphics P2P bridge 0x9874 device pci 1.1 on end # Internal Multimedia device pci 2.0 on end # PCIe Host Bridge |