diff options
author | Hannah Williams <hannah.williams@intel.com> | 2018-04-27 00:13:25 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2018-04-30 03:23:36 +0000 |
commit | ecef322bf4a1d2033286c10970f09663a1214ebb (patch) | |
tree | c728ceb31e1c3bc565f3aafb74ebb2a7c204bc51 /src | |
parent | 621abec1e842acd69d122b2b451b35b14d3c5049 (diff) |
mb/google/octopus: Fix crossystem wpsw_cur error
With only one entry for Write Protect gpio in the OIPG package, the sysfs
entry /sys/devices/platform/chromeos_acpi/GPIO.x is created as "GPIO"
instead of "GPIO.x". This was causing crossytem to return error for wpsw_cur.
BUG=b:78009842
Change-Id: Ica60f342420d95d09a45580f2f940443c03601de
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/25892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/octopus/variants/baseboard/gpio.c | 1 | ||||
-rw-r--r-- | src/soc/intel/apollolake/include/soc/gpio_glk.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c index 732653ac36..2640696174 100644 --- a/src/mainboard/google/octopus/variants/baseboard/gpio.c +++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c @@ -308,6 +308,7 @@ variant_sleep_gpio_table(size_t *num) } static const struct cros_gpio cros_gpios[] = { + CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), CROS_GPIO_WP_AH(PAD_SCC(GPIO_PCH_WP), GPIO_COMM_SCC_NAME), }; diff --git a/src/soc/intel/apollolake/include/soc/gpio_glk.h b/src/soc/intel/apollolake/include/soc/gpio_glk.h index 7145a28f1e..63bee3bba9 100644 --- a/src/soc/intel/apollolake/include/soc/gpio_glk.h +++ b/src/soc/intel/apollolake/include/soc/gpio_glk.h @@ -321,6 +321,7 @@ #define PAD_SCC(pad) (pad - SCC_OFFSET) /* Linux names of the GPIO devices. */ +#define CROS_GPIO_DEVICE_NAME "INT3453" #define GPIO_COMM_NW_NAME "INT3453:00" #define GPIO_COMM_N_NAME "INT3453:01" #define GPIO_COMM_AUDIO_NAME "INT3453:02" |