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authorElyes Haouas <ehaouas@noos.fr>2022-03-07 17:30:02 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-03-28 14:14:27 +0000
commitec97e0a29dc7441a191bc14179b36a8f233a8122 (patch)
tree8bd73a80d8170e01fdc77dd4ec1e500b6c48ad03 /src
parente4cf3fa36df5e4b7e8907f29350141a2fcb88f37 (diff)
include/spd.h: Fix DDR4_SPD_72B_SO_{R,U}DIMM values
Regarding JEDEC Standard No. 21-C, Release 30, page 13, DDR4_SPD_72B_SO_RDIMM and DDR4_SPD_72B_SO_UDIMM values are respectively 0x08 and 0x09. There is no affected board in coreboot tree. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: Id4e9c3814e2e7f379917bf93f7975af3aad31dbb Reviewed-on: https://review.coreboot.org/c/coreboot/+/62647 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src')
-rw-r--r--src/include/spd.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/include/spd.h b/src/include/spd.h
index 8493d40b6e..ca78d9ce98 100644
--- a/src/include/spd.h
+++ b/src/include/spd.h
@@ -236,8 +236,8 @@ enum ddr4_module_type {
DDR4_SPD_LRDIMM = 0x04,
DDR4_SPD_MINI_RDIMM = 0x05,
DDR4_SPD_MINI_UDIMM = 0x06,
- DDR4_SPD_72B_SO_UDIMM = 0x08,
- DDR4_SPD_72B_SO_RDIMM = 0x09,
+ DDR4_SPD_72B_SO_RDIMM = 0x08,
+ DDR4_SPD_72B_SO_UDIMM = 0x09,
DDR4_SPD_16B_SO_DIMM = 0x0c,
DDR4_SPD_32B_SO_RDIMM = 0x0d,
};