diff options
author | Frank Wu <frank_wu@compal.corp-partner.google.com> | 2022-06-29 18:08:37 +0800 |
---|---|---|
committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-07-11 14:07:14 +0000 |
commit | e3ed9cacaa2b372a3efce95308d15aea3806fbf9 (patch) | |
tree | c08a6c8122d5ee2a490e7be550ea39b1932a0723 /src | |
parent | 5c41bd67bc2d3dcf41501b486214a6538eb84ca5 (diff) |
mb/google/brya/var/banshee: Update VR domain settings
Update the VR domain settings based on the request of internal team.
- IA ac_loadline from 2.3mOhms to 2.4mOhms.
- IA dc_loadline from 2.3mOhms to 2.28mOhms.
- GT ac_loadline from 3.2mOhms to 3.13mOhms.
- GT dc_loadline from 3.2mOhms to 2.94mOhms.
BUG=b:237044562
BRANCH=firmware-brya-14505.B
TEST=FW_NAME=banshee emerge-brya coreboot chromeos-bootimage
Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: I665665ab8e3bcd6d4643f8b954b86fad3ef78ccd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65522
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/brya/variants/banshee/overridetree.cb | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/banshee/overridetree.cb b/src/mainboard/google/brya/variants/banshee/overridetree.cb index 0dbdd6962c..334a97017f 100644 --- a/src/mainboard/google/brya/variants/banshee/overridetree.cb +++ b/src/mainboard/google/brya/variants/banshee/overridetree.cb @@ -38,6 +38,25 @@ chip soc/intel/alderlake .vnn_sx_voltage_mv = 1250, }" + # VR Settings + register "domain_vr_config[VR_DOMAIN_IA]" = "{ + .vr_config_enable = 1, + .icc_max = 340, + .tdc_timewindow = 28000, + .tdc_currentlimit = 256, + .ac_loadline = 240, + .dc_loadline = 228, + }" + + register "domain_vr_config[VR_DOMAIN_GT]" = "{ + .vr_config_enable = 1, + .icc_max = 220, + .tdc_timewindow = 28000, + .tdc_currentlimit = 256, + .ac_loadline = 313, + .dc_loadline = 294, + }" + register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable Port 3 register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable Port 4 register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable Port 6 |