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authorWentao Qin <qinwentao@huaqin.corp-partner.google.com>2024-04-19 17:49:11 +0800
committerYu-Ping Wu <yupingso@google.com>2024-05-03 08:35:11 +0000
commite282422c68569fb6d8442a89ecf2c785b0c28762 (patch)
tree81df70ca32cadc819d80c0fcd92bd7b09c71c66d /src
parentb566ce4aea2473274e1e59ac9d25b316080323f3 (diff)
mb/google/corsola: Initialize USB port 0
The default MT8186 platform is to initialize USB3 port 1. Use option bit 27 in fw_config to enable initialization of USB2 port 0 to support devices mounted on it. BUG=b:335124437 TEST=boot to OS from USB-A boot to OS from SD Card BRANCH=corsola Change-Id: I725b80593f5fc498a204bf47f943c36ccbd78134 Signed-off-by: Wentao Qin <qinwentao@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82089 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yidi Lin <yidilin@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/corsola/devicetree.cb4
-rw-r--r--src/mainboard/google/corsola/mainboard.c5
-rw-r--r--src/soc/mediatek/common/include/soc/usb_common.h5
-rw-r--r--src/soc/mediatek/common/usb.c14
-rw-r--r--src/soc/mediatek/common/usb_secondary.c12
-rw-r--r--src/soc/mediatek/mt8186/Makefile.mk2
-rw-r--r--src/soc/mediatek/mt8186/include/soc/addressmap.h6
7 files changed, 43 insertions, 5 deletions
diff --git a/src/mainboard/google/corsola/devicetree.cb b/src/mainboard/google/corsola/devicetree.cb
index 300ba7b8a7..bb7f003c03 100644
--- a/src/mainboard/google/corsola/devicetree.cb
+++ b/src/mainboard/google/corsola/devicetree.cb
@@ -1,5 +1,9 @@
## SPDX-License-Identifier: GPL-2.0-only
fw_config
+ field SECONDARY_USB 27
+ option DISABLED 0
+ option ENABLED 1
+ end
field AUDIO_AMP 28 29
option AMP_ALC1019 0
option AMP_ALC5645 1
diff --git a/src/mainboard/google/corsola/mainboard.c b/src/mainboard/google/corsola/mainboard.c
index a1ba5f9356..1a0ab3c917 100644
--- a/src/mainboard/google/corsola/mainboard.c
+++ b/src/mainboard/google/corsola/mainboard.c
@@ -53,6 +53,11 @@ static void mainboard_init(struct device *dev)
setup_usb_host();
+ if (fw_config_probe(FW_CONFIG(SECONDARY_USB, ENABLED))) {
+ /* Change host to USB2 port0 for initialization */
+ setup_usb_secondary_host();
+ }
+
if (!fw_config_is_provisioned() ||
fw_config_probe(FW_CONFIG(AUDIO_AMP, AMP_ALC1019)))
configure_alc1019();
diff --git a/src/soc/mediatek/common/include/soc/usb_common.h b/src/soc/mediatek/common/include/soc/usb_common.h
index d390b70ffa..249959b910 100644
--- a/src/soc/mediatek/common/include/soc/usb_common.h
+++ b/src/soc/mediatek/common/include/soc/usb_common.h
@@ -4,6 +4,7 @@
#define SOC_MEDIATEK_USB_COMMON_H
#include <stddef.h>
+#include <stdint.h>
/* ip_pw_ctrl0 */
#define CTRL0_IP_SW_RST (0x1 << 0)
@@ -162,5 +163,7 @@ void mtk_usb_prepare(void);
void mtk_usb_adjust_phy_shift(void);
void setup_usb_host(void);
-
+void update_usb_base_regs(uintptr_t ippc_base, uintptr_t sif_base);
+void setup_usb_secondary_host(void);
+void setup_usb_host_controller(void);
#endif
diff --git a/src/soc/mediatek/common/usb.c b/src/soc/mediatek/common/usb.c
index b9fe83529d..cc2503b4e5 100644
--- a/src/soc/mediatek/common/usb.c
+++ b/src/soc/mediatek/common/usb.c
@@ -13,6 +13,12 @@
static struct ssusb_ippc_regs *ippc_regs = (void *)(SSUSB_IPPC_BASE);
static struct ssusb_sif_port *phy_ports = (void *)(SSUSB_SIF_BASE);
+void update_usb_base_regs(uintptr_t ippc_base, uintptr_t sif_base)
+{
+ ippc_regs = (void *)ippc_base;
+ phy_ports = (void *)sif_base;
+}
+
static void phy_index_power_on(int index)
{
struct ssusb_sif_port *phy = phy_ports + index;
@@ -150,7 +156,7 @@ __weak void mtk_usb_adjust_phy_shift(void)
/* do nothing */
}
-void setup_usb_host(void)
+void setup_usb_host_controller(void)
{
u3p_msg("Setting up USB HOST controller...\n");
@@ -164,3 +170,9 @@ void setup_usb_host(void)
mtk_usb_adjust_phy_shift();
u3p_msg("phy power-on done.\n");
}
+
+void setup_usb_host(void)
+{
+ update_usb_base_regs(SSUSB_IPPC_BASE, SSUSB_SIF_BASE);
+ setup_usb_host_controller();
+}
diff --git a/src/soc/mediatek/common/usb_secondary.c b/src/soc/mediatek/common/usb_secondary.c
new file mode 100644
index 0000000000..ee85630250
--- /dev/null
+++ b/src/soc/mediatek/common/usb_secondary.c
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/addressmap.h>
+#include <soc/usb.h>
+
+void setup_usb_secondary_host(void)
+{
+ /* We always consider USB2 port as the secondary UBS host regardless of the
+ register naming */
+ update_usb_base_regs(SSUSB_IPPC_BASE_P0, SSUSB_SIF_BASE_P0);
+ setup_usb_host_controller();
+}
diff --git a/src/soc/mediatek/mt8186/Makefile.mk b/src/soc/mediatek/mt8186/Makefile.mk
index 3a3cc07ce6..8e116f82e6 100644
--- a/src/soc/mediatek/mt8186/Makefile.mk
+++ b/src/soc/mediatek/mt8186/Makefile.mk
@@ -51,7 +51,7 @@ ramstage-y += soc.c
ramstage-y += ../common/spm.c spm.c
ramstage-y += ../common/sspm.c
ramstage-y += ../common/tps65132s.c
-ramstage-y += ../common/usb.c usb.c
+ramstage-y += ../common/usb.c ../common/usb_secondary.c usb.c
CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include
CPPFLAGS_common += -Isrc/soc/mediatek/common/dp/include
diff --git a/src/soc/mediatek/mt8186/include/soc/addressmap.h b/src/soc/mediatek/mt8186/include/soc/addressmap.h
index 5f0b10c5e0..64500aaad0 100644
--- a/src/soc/mediatek/mt8186/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8186/include/soc/addressmap.h
@@ -76,11 +76,13 @@ enum {
SPI5_BASE = IO_PHYS + 0x01015000,
I2C5_BASE = IO_PHYS + 0x01016000,
I2C9_BASE = IO_PHYS + 0x01019000,
- /* Corsola uses USB2 port1 instead of USB2 port0. */
+ /* IPPC_BASE is for USB2 port1, IPPC_BASE_P0 is for USB2 port0 */
+ SSUSB_IPPC_BASE_P0 = IO_PHYS + 0x01203E00,
SSUSB_IPPC_BASE = IO_PHYS + 0x01283E00,
MSDC0_BASE = IO_PHYS + 0x01230000,
- /* Corsola uses USB2 port1 instead of USB2 port0. */
+ /* SIF_BASE is for USB2 port1, SIF_BASE_P0 is for USB2 port0 */
SSUSB_SIF_BASE = IO_PHYS + 0x01C80300,
+ SSUSB_SIF_BASE_P0 = IO_PHYS + 0x01CA0300,
EFUSEC_BASE = IO_PHYS + 0x01CB0000,
MIPITX_BASE = IO_PHYS + 0x01CC0000,
MSDC0_TOP_BASE = IO_PHYS + 0x01CD0000,