diff options
author | Tristan Shieh <tristan.shieh@mediatek.com> | 2019-04-26 11:36:13 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-04-29 12:26:02 +0000 |
commit | d95425c51a6cd11a9a22d007afb66ef841359e96 (patch) | |
tree | d0cc7462152c10a989d56647af3013390ac0f1f8 /src | |
parent | 4114aa8375f152312e9f43260124092f031680a9 (diff) |
mediatek/mt8183: Set CPU frequency to 1417MHz
With the default CPU voltage (0.8v), CPU frequency should be 1417Mhz at
most. We have to raise CPU frequency to 1989MHz after increasing CPU
voltage to 1.05v in romstage.
BUG=b:80501386
BRANCH=none
Test=Boots correctly on Kukui
Change-Id: I4c3e0fa27ccda8e0efe422b6ab503a1efb1697e9
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32464
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/mediatek/mt8183/include/soc/pll.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8183/include/soc/pll.h b/src/soc/mediatek/mt8183/include/soc/pll.h index e6f5711549..2a72e2c61c 100644 --- a/src/soc/mediatek/mt8183/include/soc/pll.h +++ b/src/soc/mediatek/mt8183/include/soc/pll.h @@ -244,7 +244,7 @@ enum { /* PLL rate */ enum { - ARMPLL_LL_HZ = 1989 * MHz, + ARMPLL_LL_HZ = 1417 * MHz, ARMPLL_L_HZ = 1200 * MHz, CCIPLL_HZ = 598 * 2 * MHz, MAINPLL_HZ = 1092 * MHz, |