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| author | Lean Sheng Tan <sheng.tan@9elements.com> | 2022-04-07 15:27:12 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-11 14:01:05 +0000 |
| commit | d8bfe12257926d343f4cec6ddbc3de7cb6289c40 (patch) | |
| tree | 2b2978beacec50fd6806f7aad9b9e51e3ed7b684 /src | |
| parent | ed74918f4e5104d2adf22a53fa5586d5b86132ee (diff) | |
mb/prodrive/atlas: Configure eSPI IO decode ranges for EC
This implementation adds eSPI IO decode range for EC.
1. 0x800-0x8FF / 0x200-020F: EC host command range.
2. 0x900-0x9ff: EC memory map range.
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: I787561287025e33a8622eb9b3565fa14d0416c46
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63465
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/prodrive/atlas/devicetree.cb | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/prodrive/atlas/devicetree.cb b/src/mainboard/prodrive/atlas/devicetree.cb index 1a3a0581b3..63c34adf46 100644 --- a/src/mainboard/prodrive/atlas/devicetree.cb +++ b/src/mainboard/prodrive/atlas/devicetree.cb @@ -8,6 +8,12 @@ chip soc/intel/alderlake register "pmc_gpe0_dw1" = "GPP_D" register "pmc_gpe0_dw2" = "GPP_E" + # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f + register "gen1_dec" = "0x00fc0801" + register "gen2_dec" = "0x000c0201" + # EC memory map range is 0x900-0x9ff + register "gen3_dec" = "0x00fc0901" + # USB configuration register "usb2_ports[0]" = "USB2_PORT_MID(OC0)" register "usb2_ports[1]" = "USB2_PORT_MID(OC0)" |