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authorRaihow Shi <raihow_shi@wistron.corp-partner.google.com>2022-06-13 09:28:23 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-06-14 22:12:15 +0000
commitd79bb899c1791869f2efaf10a189cf8dbcd3feee (patch)
treea78c00e3dc5155b802f48a9fd06be1dd581b8722 /src
parentb0eef7b4bbf5e0d8bde303a3e2df82698dbd1dd5 (diff)
mb/google/brask/variants/moli: Remove the cnvi_bt_audio_offload
Remove the cnvi_bt_audio_offload because it is already probed in variant.c for moli. BUG=b:235426221 TEST=emerge-brask coreboot. Signed-off-by: Raihow Shi <raihow_shi@wistron.corp-partner.google.com> Change-Id: I15077ca161b6283e764105d1c2fbc59ead1fd761 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/variants/moli/overridetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb
index efeab1178b..c9dd411a41 100644
--- a/src/mainboard/google/brya/variants/moli/overridetree.cb
+++ b/src/mainboard/google/brya/variants/moli/overridetree.cb
@@ -27,7 +27,6 @@ chip soc/intel/alderlake
register "usb2_ports[3]" = "USB2_PORT_SHORT(OC_SKIP)" # Enable USB2 Port4
register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Disable USB2 Port9
register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable TCP3
- register "cnvi_bt_audio_offload" = "true"
device domain 0 on
device ref tcss_dma0 on
chip drivers/intel/usb4/retimer