diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2021-11-17 13:08:57 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-18 23:33:58 +0000 |
| commit | d58599dcb89dcbd31d934c0e3d2cc5240955530e (patch) | |
| tree | 5b8ee8c5543731b3fd163bb23f70aec6b194fe93 /src | |
| parent | 188be6b27008c4ca400b004c2a82127383dd318e (diff) | |
drivers/fsp: Rewrite post code hex values in lowercase
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I65a83fcd69296f13c63329701ba9ce53f7cc2cb3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59393
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/drivers/intel/fsp1_1/cache_as_ram.S | 2 | ||||
| -rw-r--r-- | src/soc/intel/common/block/cpu/car/cache_as_ram.S | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.S b/src/drivers/intel/fsp1_1/cache_as_ram.S index e20d5277ed..6a19b870f2 100644 --- a/src/drivers/intel/fsp1_1/cache_as_ram.S +++ b/src/drivers/intel/fsp1_1/cache_as_ram.S @@ -181,7 +181,7 @@ CAR_init_done: pushl %eax /* tsc[31:0] */ before_romstage: - post_code(0x2A) + post_code(0x2a) /* Call bootblock_c_entry(uint64_t base_timestamp) */ call bootblock_c_entry diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S index cac7854d34..1c905a4c96 100644 --- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S +++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S @@ -295,7 +295,7 @@ car_init_done: #endif before_carstage: - post_code(0x2A) + post_code(0x2a) call bootblock_c_entry /* Never reached */ |