cpu/x86/Kconfig: Mark 64bit support as stable

With SMM holding page tables itself, we can consider SMM support stable
and safe enough for general use.

Also update the respective documentation.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: Ifcf0a1a5097a2d7c064bb709ec0b09ebee13a47d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80338
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>

10 files changed, 15 insertions, 17 deletions

diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 3f97644567..d2ae320810 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -65,23 +65,21 @@ config ARCH_ALL_STAGES_X86_64
 	select ARCH_ROMSTAGE_X86_64
 	select ARCH_RAMSTAGE_X86_64
 
-config HAVE_EXP_X86_64_SUPPORT
+config HAVE_X86_64_SUPPORT
 	bool
 	help
 	  Enable experimental support to build and run coreboot in 64-bit mode.
 	  When selecting this option for a new platform, it is highly advisable
 	  to provide a config file for Jenkins to build-test the 64-bit option.
 
-config USE_EXP_X86_64_SUPPORT
-	bool "[EXPERIMENTAL] Run coreboot in long (64-bit) mode"
-	depends on HAVE_EXP_X86_64_SUPPORT
+config USE_X86_64_SUPPORT
+	bool "Run coreboot in long (64-bit) mode"
+	depends on HAVE_X86_64_SUPPORT
 	select ARCH_ALL_STAGES_X86_64
 	help
 	  When set, most of coreboot runs in long (64-bit) mode instead of the
 	  usual protected flat (32-bit) mode. 64-bit CPUs and OSes can be used
-	  irrespective of whether coreboot runs in 32-bit or 64-bit mode. This
-	  is an experimental option: do not enable unless one wants to test it
-	  and has the means to recover a system when coreboot fails to boot.
+	  irrespective of whether coreboot runs in 32-bit or 64-bit mode.
 
 config PAGE_TABLES_IN_CBFS
 	bool
diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig
index 15a160a7a2..2b9c4b2d79 100644
--- a/src/cpu/intel/model_2065x/Kconfig
+++ b/src/cpu/intel/model_2065x/Kconfig
@@ -2,7 +2,7 @@
 
 config CPU_INTEL_MODEL_2065X
 	bool
-	select HAVE_EXP_X86_64_SUPPORT
+	select HAVE_X86_64_SUPPORT
 	select ARCH_X86
 	select SSE2
 	select UDELAY_TSC
diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig
index bdca12cddc..cf1664044a 100644
--- a/src/cpu/intel/model_206ax/Kconfig
+++ b/src/cpu/intel/model_206ax/Kconfig
@@ -3,7 +3,7 @@
 config CPU_INTEL_MODEL_206AX
 	bool
 	select ARCH_X86
-	select HAVE_EXP_X86_64_SUPPORT
+	select HAVE_X86_64_SUPPORT
 	select SSE2
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER
diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
index 0fa999e1ac..b5ff6f09a5 100644
--- a/src/cpu/qemu-x86/Kconfig
+++ b/src/cpu/qemu-x86/Kconfig
@@ -3,7 +3,7 @@
 config CPU_QEMU_X86
 	bool
 	select ARCH_X86
-	select HAVE_EXP_X86_64_SUPPORT
+	select HAVE_X86_64_SUPPORT
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER
 	select UNKNOWN_TSC_RATE
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index 2a266b9771..4fe20ee966 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -7,7 +7,7 @@ config NORTHBRIDGE_INTEL_GM45
 	select INTEL_EDID
 	select INTEL_GMA_ACPI
 	select INTEL_GMA_SSC_ALTERNATE_REF
-	select HAVE_EXP_X86_64_SUPPORT
+	select HAVE_X86_64_SUPPORT
 	select USE_DDR3
 	select USE_DDR2
 
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
index 248852e2e9..4bc12af3c9 100644
--- a/src/northbridge/intel/x4x/Kconfig
+++ b/src/northbridge/intel/x4x/Kconfig
@@ -7,7 +7,7 @@ config NORTHBRIDGE_INTEL_X4X
 	select INTEL_GMA_ACPI
 	select CACHE_MRC_SETTINGS
 	select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
-	select HAVE_EXP_X86_64_SUPPORT
+	select HAVE_X86_64_SUPPORT
 	select USE_DDR3
 	select USE_DDR2
 
diff --git a/src/soc/amd/genoa_poc/Kconfig b/src/soc/amd/genoa_poc/Kconfig
index 05590f5cba..f4bd7d6418 100644
--- a/src/soc/amd/genoa_poc/Kconfig
+++ b/src/soc/amd/genoa_poc/Kconfig
@@ -11,7 +11,7 @@ config SOC_SPECIFIC_OPTIONS
 	select ARCH_X86
 	select DEFAULT_X2APIC
 	select HAVE_ACPI_TABLES
-	select HAVE_EXP_X86_64_SUPPORT
+	select HAVE_X86_64_SUPPORT
 	select HAVE_SMI_HANDLER
 	select RESET_VECTOR_IN_RAM
 	select SOC_AMD_COMMON
@@ -50,7 +50,7 @@ config SOC_SPECIFIC_OPTIONS
 	select SOC_AMD_OPENSIL_GENOA_POC
 	select X86_CUSTOM_BOOTMEDIA
 
-config USE_EXP_X86_64_SUPPORT
+config USE_X86_64_SUPPORT
 	default y
 
 config CHIPSET_DEVICETREE
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 864643fd4a..d6c3fbd3e9 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -77,7 +77,7 @@ config SOC_AMD_PICASSO
 	select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE
 	select X86_AMD_FIXED_MTRRS
 	select X86_INIT_NEED_1_SIPI
-	select HAVE_EXP_X86_64_SUPPORT
+	select HAVE_X86_64_SUPPORT
 	help
 	  AMD Picasso support
 
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index ab2efc375d..7548e46b36 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -79,7 +79,7 @@ config SOC_INTEL_CANNONLAKE_BASE
 config SOC_INTEL_COFFEELAKE
 	bool
 	select SOC_INTEL_CANNONLAKE_BASE
-	select HAVE_EXP_X86_64_SUPPORT
+	select HAVE_X86_64_SUPPORT
 	select HECI_DISABLE_USING_SMM
 	select INTEL_CAR_NEM
 
diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
index 23d2f8b6d7..2e0ad01e00 100644
--- a/src/soc/intel/xeon_sp/spr/Kconfig
+++ b/src/soc/intel/xeon_sp/spr/Kconfig
@@ -16,7 +16,7 @@ config SOC_INTEL_SAPPHIRERAPIDS_SP
 	select FSP_SPEC_VIOLATION_XEON_SP_HEAP_WORKAROUND
 	select UDK_202005_BINDING
 	select SOC_INTEL_HAS_CXL
-	select HAVE_EXP_X86_64_SUPPORT
+	select HAVE_X86_64_SUPPORT
 	help
 	  Intel Sapphire Rapids-SP support