diff options
author | Subrata Banik <subratabanik@google.com> | 2023-04-01 14:48:15 +0530 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2023-04-02 10:07:12 +0000 |
commit | d0d7f4710410bbf7d5ca7e89c740cf9f5d872a82 (patch) | |
tree | 3ed3feec5b6c34fbd79e64f329cd3ff092ce1bc1 /src | |
parent | 725f2c8a81fb97dd038692f1b708a18e05734a34 (diff) |
soc/intel/meteorlake: Add EPP override support
This updates energy performance preference value to all logical CPUs
when the corresponding chip config is true.
This patch is backported from
`commit 0bb2225718ef898c ("soc/intel/alderlake: Add EPP override
support")`.
BUG=b:266522659
TEST=Able to build and boot google/rex.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I8172276159fe3987dae36ec30ebceb76dd0ef326
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74154
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/intel/meteorlake/chip.h | 4 | ||||
-rw-r--r-- | src/soc/intel/meteorlake/cpu.c | 21 |
2 files changed, 24 insertions, 1 deletions
diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h index 9bafb2268e..9d9a600b45 100644 --- a/src/soc/intel/meteorlake/chip.h +++ b/src/soc/intel/meteorlake/chip.h @@ -346,6 +346,10 @@ struct soc_intel_meteorlake_config { /* Enable PCH to CPU energy report feature. */ bool pch_pm_energy_report_enable; + + /* Energy-Performance Preference (HWP feature) */ + bool enable_energy_perf_pref; + uint8_t energy_perf_pref_value; }; typedef struct soc_intel_meteorlake_config config_t; diff --git a/src/soc/intel/meteorlake/cpu.c b/src/soc/intel/meteorlake/cpu.c index 31b7ef26bf..62639a1992 100644 --- a/src/soc/intel/meteorlake/cpu.c +++ b/src/soc/intel/meteorlake/cpu.c @@ -124,6 +124,12 @@ void soc_core_init(struct device *cpu) /* Set energy policy */ set_energy_perf_bias(ENERGY_POLICY_NORMAL); + const config_t *conf = config_of_soc(); + /* Set energy-performance preference */ + if (conf->enable_energy_perf_pref) + if (check_energy_perf_cap()) + set_energy_perf_pref(conf->energy_perf_pref_value); + /* Enable Turbo */ enable_turbo(); @@ -140,6 +146,19 @@ static void per_cpu_smm_trigger(void) smm_relocate(); } +static void pre_mp_init(void) +{ + soc_fsp_load(); + + const config_t *conf = config_of_soc(); + if (conf->enable_energy_perf_pref) { + if (check_energy_perf_cap()) + enable_energy_perf_pref(); + else + printk(BIOS_WARNING, "Energy Performance Preference not supported!\n"); + } +} + static void post_mp_init(void) { /* Set Max Ratio */ @@ -160,7 +179,7 @@ static const struct mp_ops mp_ops = { * that are set prior to ramstage. * Real MTRRs programming are being done after resource allocation. */ - .pre_mp_init = soc_fsp_load, + .pre_mp_init = pre_mp_init, .get_cpu_count = get_cpu_count, .get_smm_info = smm_info, .get_microcode_info = get_microcode_info, |