diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-02-06 17:04:54 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-08 15:08:48 +0000 |
| commit | cf9b06971fe9d1ea4b817e93b1decc886bb954d4 (patch) | |
| tree | b0d66fbf33d707916491e09757358cc7bbf8bb1b /src | |
| parent | 6a6ac1e0b929a47aedcff41420990cd700e22d13 (diff) | |
soc/amd/picasso/cpu: use CPUID_ALL_STEPPINGS_MASK
Use CPUID_ALL_STEPPINGS_MASK to only need one CPU device ID table entry
per family & model combination and not one per stepping.
TEST=Mandolin with a Picasso APU with PICASSO_B1_CPUID (0x00810f81)
still finished mpinit and boots successfully even though now only
PICASSO_B0_CPUID (0x00810f80) with CPUID_ALL_STEPPINGS_MASK specified as
device match mask. When commenting out the line with PICASSO_B0_CPUID
as a negative test, mpinit fails as expected.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I00ba43834ad86ecffa09d60599b17d122acd0b99
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72848
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/picasso/cpu.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c index 0ec753da37..5d206e4fbe 100644 --- a/src/soc/amd/picasso/cpu.c +++ b/src/soc/amd/picasso/cpu.c @@ -48,11 +48,9 @@ static struct device_operations cpu_dev_ops = { }; static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, RAVEN1_B0_CPUID, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_AMD, PICASSO_B0_CPUID, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_AMD, PICASSO_B1_CPUID, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_AMD, RAVEN2_A0_CPUID, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_AMD, RAVEN2_A1_CPUID, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_AMD, RAVEN1_B0_CPUID, CPUID_ALL_STEPPINGS_MASK }, + { X86_VENDOR_AMD, PICASSO_B0_CPUID, CPUID_ALL_STEPPINGS_MASK }, + { X86_VENDOR_AMD, RAVEN2_A0_CPUID, CPUID_ALL_STEPPINGS_MASK }, { 0, 0, 0 }, }; |