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authorMathew King <mathewk@chromium.org>2021-03-16 12:49:26 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-03-18 17:55:23 +0000
commitcec52453b7d6dc48d3f004be73e49f84c327d54b (patch)
tree407ef353713c985e3f7d8b635d2bab130cd9354d /src
parent33f3c53504cd1ad95c85c7f8451159e61ec845a6 (diff)
mb/google/guybrush: Configure UART0 gpio in early stage
BUG=b:180721208 TEST=builds Signed-off-by: Mathew King <mathewk@chromium.org> Change-Id: I8aa54acf1fa9295b27c33a0066432665e6e3755c Reviewed-on: https://review.coreboot.org/c/coreboot/+/51540 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/guybrush/variants/baseboard/gpio.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/guybrush/variants/baseboard/gpio.c b/src/mainboard/google/guybrush/variants/baseboard/gpio.c
index 21fc420866..9b8df52dfb 100644
--- a/src/mainboard/google/guybrush/variants/baseboard/gpio.c
+++ b/src/mainboard/google/guybrush/variants/baseboard/gpio.c
@@ -166,6 +166,10 @@ static const struct soc_amd_gpio early_gpio_table[] = {
PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE),
/* ESPI_ALERT_L */
PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE),
+ /* UART0_RXD */
+ PAD_NF(GPIO_141, UART0_RXD, PULL_NONE),
+ /* UART0_TXD */
+ PAD_NF(GPIO_143, UART0_TXD, PULL_NONE),
};
/* GPIO configuration for sleep */