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authorNico Huber <nico.h@gmx.de>2019-11-17 01:45:50 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-18 11:50:55 +0000
commitcc32a6980797abc5ce6365ce4c4c8c7418c8c224 (patch)
tree78dfde16f1493b768f64cd47cd6f46ce0e5f9528 /src
parent052e3ef3345b0281de7a0f751ab6d3fd1b4d6932 (diff)
mb/lenovo/s230u: Don't write BUC and beyond
The BUC register is actually only 8 bits wide and setting bit 5 (disabling GbE) is already done by generic code. Change-Id: I4b8e14606c319e8bfc48d6757087f28af1bd5dfb Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36894 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/lenovo/s230u/early_init.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/mainboard/lenovo/s230u/early_init.c b/src/mainboard/lenovo/s230u/early_init.c
index 7c302b8999..2de0637140 100644
--- a/src/mainboard/lenovo/s230u/early_init.c
+++ b/src/mainboard/lenovo/s230u/early_init.c
@@ -40,11 +40,6 @@ void mainboard_pch_lpc_setup(void)
ec_mm_set_bit(0x3b, 4);
}
-void mainboard_late_rcba_config(void)
-{
- /* Disable devices. */
- RCBA32(BUC) = 0x00000020;
-}
const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 1, 0 },
{ 1, 0, 0 },