diff options
| author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | 2023-09-28 15:16:06 +0800 |
|---|---|---|
| committer | Eric Lai <ericllai@google.com> | 2023-10-04 05:02:08 +0000 |
| commit | c0dfd982baa461b055cdb52b7ac56e7b337795f5 (patch) | |
| tree | ad7f407884820b14a5ab88acfcd7c4393b4be43d /src | |
| parent | f339190d071dbe3aea3b62daec0d8485701f6d27 (diff) | |
mb/google/nissa/var/yaviks: Add probe in devicetree for USB C1/A0 port
Add probe fw_config to USB C1/A0 port on daught_board for DB_1A sku.
BUG=b:294456574
TEST=emerge-nissa coreboot
Change-Id: I2261b0e4d2b673b6186a435cce8dc6a4ccacb0a7
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78175
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Derek Huang <derekhuang@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/brya/variants/yaviks/overridetree.cb | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/src/mainboard/google/brya/variants/yaviks/overridetree.cb b/src/mainboard/google/brya/variants/yaviks/overridetree.cb index 8c36f7e9c3..308ed1001e 100644 --- a/src/mainboard/google/brya/variants/yaviks/overridetree.cb +++ b/src/mainboard/google/brya/variants/yaviks/overridetree.cb @@ -494,7 +494,11 @@ chip soc/intel/alderlake chip drivers/intel/pmc_mux/conn use usb2_port2 as usb2_port use tcss_usb3_port2 as usb3_port - device generic 1 alias conn1 on end + device generic 1 alias conn1 on + probe DB_USB DB_1C_1A + probe DB_USB DB_1C + probe DB_USB DB_1C_LTE + end end end end @@ -514,7 +518,11 @@ chip soc/intel/alderlake register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" - device ref tcss_usb3_port2 on end + device ref tcss_usb3_port2 on + probe DB_USB DB_1C_1A + probe DB_USB DB_1C + probe DB_USB DB_1C_LTE + end end end end @@ -534,7 +542,11 @@ chip soc/intel/alderlake register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" - device ref usb2_port2 on end + device ref usb2_port2 on + probe DB_USB DB_1C_1A + probe DB_USB DB_1C + probe DB_USB DB_1C_LTE + end end chip drivers/usb/acpi register "desc" = ""USB2 Type-A Port A0 (MLB)"" @@ -561,6 +573,7 @@ chip soc/intel/alderlake register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" device ref usb2_port4 on probe DB_USB DB_1C_1A + probe DB_USB DB_1A end end chip drivers/usb/acpi @@ -614,6 +627,7 @@ chip soc/intel/alderlake register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" device ref usb3_port2 on probe DB_USB DB_1C_1A + probe DB_USB DB_1A end end chip drivers/usb/acpi |