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authorRonak Kanabar <ronak.kanabar@intel.com>2023-05-31 10:28:51 +0530
committerSubrata Banik <subratabanik@google.com>2023-06-04 18:18:49 +0000
commitb807a1d0352d1b5c8996c0a04f71d61ae663db63 (patch)
treef2b1b13ad2b17cce8caf2bff4d37e61d9974176b /src
parent6a7703f6449432fec04b1a3992bf8b289d1aa289 (diff)
soc/intel/meteorlake: Hook up UPD PchHdaSdiEnable
Hook the PchHdaSdiEnable UPD so that mainboard can change the settings via devicetree. PchHdaSdiEnable UPD enable HDA SDI lanes. BUG=b:273962021 TEST=Verified the settings on google/rex using debug FSP logs. Change-Id: I43f1e59d28fc07218f8e25266f8ce3bdcf3f6e5c Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75529 Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tarun Tuli <taruntuli@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/meteorlake/chip.h3
-rw-r--r--src/soc/intel/meteorlake/romstage/fsp_params.c4
2 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h
index acb3738f48..37a76154bc 100644
--- a/src/soc/intel/meteorlake/chip.h
+++ b/src/soc/intel/meteorlake/chip.h
@@ -19,6 +19,7 @@
#include <stdint.h>
#define MAX_SAGV_POINTS 4
+#define MAX_HD_AUDIO_SDI_LINKS 2
/* Types of different SKUs */
enum soc_intel_meteorlake_power_limits {
@@ -192,6 +193,8 @@ struct soc_intel_meteorlake_config {
/* Audio related */
uint8_t pch_hda_dsp_enable;
+ bool pch_hda_sdi_enable[MAX_HD_AUDIO_SDI_LINKS];
+
/* iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T */
enum {
HDA_TMODE_2T = 0,
diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c
index 171009fcaa..0173060948 100644
--- a/src/soc/intel/meteorlake/romstage/fsp_params.c
+++ b/src/soc/intel/meteorlake/romstage/fsp_params.c
@@ -223,6 +223,10 @@ static void fill_fspm_audio_params(FSP_M_CONFIG *m_cfg,
m_cfg->PchHdaIDispLinkTmode = config->pch_hda_idisp_link_tmode;
m_cfg->PchHdaIDispLinkFrequency = config->pch_hda_idisp_link_frequency;
m_cfg->PchHdaIDispCodecDisconnect = !config->pch_hda_idisp_codec_enable;
+
+ for (int i = 0; i < MAX_HD_AUDIO_SDI_LINKS; i++)
+ m_cfg->PchHdaSdiEnable[i] = config->pch_hda_sdi_enable[i];
+
/*
* All the PchHdaAudioLink{Hda|Dmic|Ssp|Sndw}Enable UPDs are used by FSP only to
* configure GPIO pads for audio. Mainboard is expected to perform all GPIO