diff options
| author | Aamir Bohra <aamir.bohra@intel.com> | 2019-05-29 13:33:32 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-06-20 08:48:54 +0000 |
| commit | b09de70eda443d2fc9f4891c7647aac4526a8e99 (patch) | |
| tree | 10398c003333c656c1ccf538f53870b8b301cbaf /src | |
| parent | 685b377e7e56ed6a046204baf73c43d76a87f4b4 (diff) | |
mb/google/hatch: Remove unused USB2 port5 from baseboard devicetree
Hatch newer board revision do not use USB port5 for discrete BT.
Hence remove the port configuration and UBS2 P5 asl entry. The older
board version would continue to use USB2 P5 hence moved the entry to
overridetree.cb
Change-Id: I98297d6b81e3184b7b0a14710f3790f5df30d68b
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33060
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/hatch/variants/baseboard/devicetree.cb | 12 | ||||
| -rw-r--r-- | src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb | 17 |
2 files changed, 20 insertions, 9 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 112c279fcb..a66c74328e 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -56,12 +56,12 @@ chip soc/intel/cannonlake register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 1 register "usb2_ports[2]" = "USB2_PORT_SHORT(OC3)" # Type-A Port 0 register "usb2_ports[3]" = "USB2_PORT_LONG(OC3)" # Type-A Port 1 - register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # BT + register "usb2_ports[4]" = "USB2_PORT_EMPTY" register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # WWAN register "usb2_ports[6]" = "USB2_PORT_LONG(OC_SKIP)" # Camera register "usb2_ports[7]" = "USB2_PORT_EMPTY" register "usb2_ports[8]" = "USB2_PORT_EMPTY" - register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # CnVi BT + register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # BT register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 0 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 1 @@ -145,12 +145,6 @@ chip soc/intel/cannonlake device usb 2.3 on end end chip drivers/usb/acpi - register "desc" = ""Discrete bluetooth"" - register "type" = "UPC_TYPE_INTERNAL" - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C14)" - device usb 2.4 on end - end - chip drivers/usb/acpi register "desc" = ""WWAN"" register "type" = "UPC_TYPE_INTERNAL" device usb 2.5 on end @@ -161,7 +155,7 @@ chip soc/intel/cannonlake device usb 2.6 on end end chip drivers/usb/acpi - register "desc" = ""Integrated CnVi bluetooth"" + register "desc" = ""Bluetooth"" register "type" = "UPC_TYPE_INTERNAL" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C14)" device usb 2.9 on end diff --git a/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb b/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb index fe7869dd4b..373438cf8a 100644 --- a/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb +++ b/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb @@ -32,7 +32,24 @@ chip soc/intel/cannonlake # GPIO for SD card detect register "sdcard_cd_gpio" = "vSD3_CD_B" + # USB configuration + register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Discrete BT + device domain 0 on + device pci 14.0 on + chip drivers/usb/acpi + register "desc" = ""Root Hub"" + register "type" = "UPC_TYPE_HUB" + device usb 0.0 on + chip drivers/usb/acpi + register "desc" = ""Discrete bluetooth"" + register "type" = "UPC_TYPE_INTERNAL" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C14)" + device usb 2.4 on end + end + end + end + end # USB xHCI device pci 15.0 on chip drivers/i2c/generic register "hid" = ""ELAN0000"" |