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authorFelix Held <felix-coreboot@felixheld.de>2023-05-23 19:48:15 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-05-25 20:54:00 +0000
commitaec951eb3af961953f9e8152fd05f32e11b11f36 (patch)
treeadad80f3cb9d9e7a5cad216594ab94a7b8f454cf /src
parent9c599c8b30eca53292cc9af6b01718ac8de46807 (diff)
arch/x86/include/arch/pci_io_cfg: add IO port count & last port defines
The PCI config space access via IO ports uses two 32 bit IO ports. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ie99b4f5fc01fb0405243ff108d813ee1a3d35e5d Reviewed-on: https://review.coreboot.org/c/coreboot/+/75408 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/arch/x86/include/arch/pci_io_cfg.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h
index 45c757c95b..288bbc2eff 100644
--- a/src/arch/x86/include/arch/pci_io_cfg.h
+++ b/src/arch/x86/include/arch/pci_io_cfg.h
@@ -7,8 +7,10 @@
#include <arch/io.h>
#include <device/pci_type.h>
-#define PCI_IO_CONFIG_INDEX 0xcf8
-#define PCI_IO_CONFIG_DATA 0xcfc
+#define PCI_IO_CONFIG_INDEX 0xcf8
+#define PCI_IO_CONFIG_DATA 0xcfc
+#define PCI_IO_CONFIG_PORT_COUNT 8
+#define PCI_IO_CONFIG_LAST_PORT (PCI_IO_CONFIG_INDEX + PCI_IO_CONFIG_PORT_COUNT - 1)
static __always_inline
uint32_t pci_io_encode_addr(pci_devfn_t dev, uint16_t reg)