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authorMichael Niewöhner <foss@mniewoehner.de>2022-03-06 12:04:20 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2022-03-08 17:55:32 +0000
commita96c3da0c5fc9e42bd81c2f33c62589ffa20a738 (patch)
treede3948a5d11d73d3c6f6f079daee8e6fff6b0fc3 /src
parentfdc4e8e0c0fdfa130475c3ce919672f9520373b5 (diff)
soc/intel/tgl: chipset devicetree: correct TraceHub device alias
Device 1f.7 is TraceHub, not the PCH Thermal device, which doesn't exist anymore on TGL. Correct the device´s alias. Reference: Intel doc# 631119-007 Change-Id: I30a4ab1e801f6cdb0f2e03f105bf8cc09592eed8 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62623 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/tigerlake/chipset.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/chipset.cb b/src/soc/intel/tigerlake/chipset.cb
index 4ebfcfdc87..f0576ad5e6 100644
--- a/src/soc/intel/tigerlake/chipset.cb
+++ b/src/soc/intel/tigerlake/chipset.cb
@@ -152,6 +152,6 @@ chip soc/intel/tigerlake
device pci 1f.4 alias smbus off end
device pci 1f.5 alias fast_spi on end
device pci 1f.6 alias gbe off end
- device pci 1f.7 alias thermal off end
+ device pci 1f.7 alias tracehub off end
end
end