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authorElyes Haouas <ehaouas@noos.fr>2022-10-30 10:20:33 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-11-04 00:56:13 +0000
commit9ee9cd30a2a5168e017cefc9c07a54cef6e03763 (patch)
tree0853e00c2b72566f0d887911f88f742edb34c02e /src
parent49af63b8a115b18abc719e4af531cd948e58ba63 (diff)
nb/intel/sandybridge: Specify supported memory types
Change-Id: Ie43e818d03f411733e1bba5b7a4721c9a54ff4a4 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69019 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/sandybridge/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index 3abbddf98d..551714a79f 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -9,6 +9,14 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE
if NORTHBRIDGE_INTEL_SANDYBRIDGE
+config NORTHBRIDGE_SPECIFIC_OPTIONS
+ def_bool y
+ select NO_DDR5
+ select NO_LPDDR4
+ select NO_DDR4
+ select NO_DDR2
+ select USE_DDR3
+
config SANDYBRIDGE_VBOOT_IN_ROMSTAGE
bool
default n