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authorStefan Reinauer <reinauer@chromium.org>2015-04-27 13:40:16 -0700
committerMartin Roth <martinroth@google.com>2016-03-08 16:31:19 +0100
commit9d5e36e839382920e2b5b9f138bd03c3d40276f5 (patch)
tree7f828d8e5863927918129bda3c6ef6f5caaa1bb0 /src
parent0d187917554f710ac3af04c59bd18b59837a178c (diff)
cpu/x86: Sort some Kconfig options
Change-Id: I25ea327ed151e18ccb5d13626d44925d2a253d08 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/10012 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/cpu/x86/Kconfig23
1 files changed, 14 insertions, 9 deletions
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig
index 94225a3807..d8f338d5d0 100644
--- a/src/cpu/x86/Kconfig
+++ b/src/cpu/x86/Kconfig
@@ -1,7 +1,16 @@
+# TODO These two options look too similar
config PARALLEL_CPU_INIT
bool
default n
+config PARALLEL_MP
+ def_bool n
+ help
+ This option uses common MP infrastructure for bringing up APs
+ in parallel. It additionally provides a more flexible mechanism
+ for sequencing the steps of bringing up the APs.
+
+
config UDELAY_IO
bool
default y if !UDELAY_LAPIC && !UDELAY_TSC && !UDELAY_TIMER2
@@ -39,11 +48,14 @@ config TSC_MONOTONIC_TIMER
help
Expose monotonic time using the TSC.
-config UDELAY_TIMER2
+# This option is used in code but never selected.
+config TSC_CALIBRATE_WITH_IO
bool
+ depends on UDELAY_TSC
default n
-config TSC_CALIBRATE_WITH_IO
+# This option is used in code but never selected.
+config UDELAY_TIMER2
bool
default n
@@ -121,13 +133,6 @@ config PLATFORM_USES_FSP1_0
Selected for Intel processors/platform combinations that use the
Intel Firmware Support Package (FSP) 1.0 for initialization.
-config PARALLEL_MP
- def_bool n
- help
- This option uses common MP infrastructure for bringing up APs
- in parallel. It additionally provides a more flexible mechanism
- for sequencing the steps of bringing up the APs.
-
config BACKUP_DEFAULT_SMM_REGION
def_bool n
help