summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorKevin Chiu <kevin.chiu@quantatw.com>2020-10-18 17:19:22 +0800
committerFelix Held <felix-coreboot@felixheld.de>2020-10-21 12:53:17 +0000
commit9cc148d8c50df689e6647132746026c3354a2700 (patch)
tree714e403ff583aa34b2018bcd2ccf59662e979deb /src
parent0088b3df28938d03039e78a780508d5351adea13 (diff)
mb/google/zork: update USB 2.0 controller Lane Parameter for morphius
Enhance USB 2.0 SI by increasing the level of "HS DC Voltage Level" and "Disconnect Threshold Adjustment". COMPDISTUNE0: 0x3->0x7 TXVREFTUNE0: 0x6->0xf BUG=b:162614573 BRANCH=zork TEST=1. emerge-zork coreboot 2. check U2 registers are set correctly 3. test with servo v4 type-c, it's working expectedly. 4. U2 SI pass Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com> Change-Id: I278cc0aaddbc9fce595bf57ca69ee8abfc9f5659 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46537 Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/zork/variants/morphius/overridetree.cb13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/morphius/overridetree.cb b/src/mainboard/google/zork/variants/morphius/overridetree.cb
index ecadb072c1..66b371be04 100644
--- a/src/mainboard/google/zork/variants/morphius/overridetree.cb
+++ b/src/mainboard/google/zork/variants/morphius/overridetree.cb
@@ -35,6 +35,19 @@ chip soc/amd/picasso
.ports.xhci0_port2 = 1, /* Left USB3A port 2 */
}"
+ # USB 2.0 strength
+ register "usb_2_port_tune_params[3]" = "{
+ .com_pds_tune = 0x07,
+ .sq_rx_tune = 0x3,
+ .tx_fsls_tune = 0x3,
+ .tx_pre_emp_amp_tune = 0x03,
+ .tx_pre_emp_pulse_tune = 0x0,
+ .tx_rise_tune = 0x1,
+ .rx_vref_tune = 0xf,
+ .tx_hsxv_tune = 0x3,
+ .tx_res_tune = 0x01,
+ }"
+
# Enable I2C2 for trackpad, touchscreen, pen at 400kHz
register "i2c[2]" = "{
.speed = I2C_SPEED_FAST,