diff options
author | Sukumar Ghorai <sukumar.ghorai@intel.com> | 2023-12-07 18:33:43 -0800 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2023-12-20 04:28:27 +0000 |
commit | 9b3c5afc00ebbc22c0d5b400bfb8ed8946fe67d1 (patch) | |
tree | 6073ba8785ff43bdbb001396b3ac2a21ddb931df /src | |
parent | 20629b4e650bfd9031678d39d33862522b67fc2b (diff) |
acpi: Reduce wait interval in delay loop for sleep
The optimization of sleep time in acpi code includes reducing the sleep
duration and increasing the polling frequency within the acpi _ON/_OFF
method. StorageD3Enable is activated in Google/Rex, and this
optimization results in a saving of approximately 25ms in D3cold resume
time, reducing it from around 160ms to 135ms.
BUG=b:296206467
BRANCH=firmware-rex-15709.B
TEST=boot test verified on google/rex
verified _ON/_OFF Method in SSDT.
verifid kernel log in s0ix test -
0000:00:06.0: PM: pci_pm_resume_noirq
Change-Id: I7ba960cb78b42ff0108a48f00206b6df0c78ce7a
Signed-off-by: Sukumar Ghorai <sukumar.ghorai@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79414
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <czapiga@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/acpi/acpigen.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/acpi/acpigen.c b/src/acpi/acpigen.c index ac95026562..64ec7343e1 100644 --- a/src/acpi/acpigen.c +++ b/src/acpi/acpigen.c @@ -2459,10 +2459,10 @@ void acpigen_write_delay_until_namestr_int(uint32_t wait_ms, const char *name, u uint32_t wait_ms_segment = 1; uint32_t segments = wait_ms; - /* Sleep in 16ms segments if delay is more than 32ms. */ - if (wait_ms > 32) { - wait_ms_segment = 16; - segments = wait_ms / 16; + /* Sleep in 2ms segments if delay is more than 2ms. */ + if (wait_ms > 2) { + wait_ms_segment = 2; + segments = wait_ms / wait_ms_segment; } acpigen_write_store_int_to_op(segments, LOCAL7_OP); |