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| author | Zheng Bao <zheng.bao@amd.com> | 2020-08-17 11:11:48 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-10-20 12:29:32 +0000 |
| commit | 944d00b28ccd10985ee93a27139d4810fbe7955e (patch) | |
| tree | 9f160205aef59e178af33018c8fda46e757b6070 /src | |
| parent | 77f340a707a868d56d8348cd9ab03308f4902bd9 (diff) | |
soc/amd/picasso: Use readelf to find bootblock size and location
The Picasso build describes the DRAM region where the PSP places
our bootblock. Rather than relying on Kconfig values, make the build
more robust by using the actual size and target base address
from the boot block's ELF file.
Sample output of "readelf -l bootblock.elf" is:
------------------
Elf file type is EXEC (Executable file)
Entry point 0x203fff0
There is 1 program header, starting at offset 52
Program Headers:
Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
LOAD 0x001000 0x02030000 0x02030000 0x10000 0x10000 RWE 0x1000
Section to Segment mapping:
Segment Sections...
00 .text .data .bss .reset
------------------
We can extract the information from here.
BUG=b:154957411
TEST=Build & boot on mandolin
Change-Id: I5a26047726f897c57325387cb304fddbc73f6504
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46092
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 9757160d19..514b313a6d 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -209,12 +209,8 @@ PSP_APOB_BASE=$(CONFIG_PSP_APOB_DRAM_ADDRESS) # type = 0x62 PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img PSP_ELF_FILE=$(objcbfs)/bootblock.elf -# TODO(b/154957411): Refactor amdfwtool to extract the address and size from -# the elf file. -PSP_BIOSBIN_SIZE=$(CONFIG_C_ENV_BOOTBLOCK_SIZE) -# This address must match the BOOTBLOCK logic in arch/x86/memlayout.ld. -PSP_BIOSBIN_DEST=$(shell printf "%x" $(call int-subtract, $(call int-add, $(CONFIG_X86_RESET_VECTOR) 0x10) $(PSP_BIOSBIN_SIZE))) - +PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -l $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}') +PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -l $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}') # type = 0x63 - construct APOB NV base/size from flash map # The flashmap section used for this is expected to be named RW_MRC_CACHE APOB_NV_SIZE=$(shell grep "FMAP_SECTION_RW_MRC_CACHE_SIZE" $(obj)/fmap_config.h | awk '{print $$(NF)}') |