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authorCliff Huang <cliff.huang@intel.corp-partner.google.com>2022-03-07 18:45:01 -0800
committerFelix Held <felix-coreboot@felixheld.de>2022-03-14 15:48:29 +0000
commit938f33e9f7756d730a1da278679087476a476bf2 (patch)
tree8a60e4df5e635e57c2a1ae11a6879cc947dcadbc /src
parent0bb2225718ef898c102ed88ed9deebfe1a714df0 (diff)
mb/google/brya: Set EPP to 45% for all Brya variants
This sets EPP value to be 45% for all Brya variants. Historically, EPP Ratio has always been 50% (128) on Chrome platforms. But on Intel Alderlake EPP ratio of 45% is recommended for optimal power and performance on Chrome platforms. BUG=b:219785001 BRANCH=firmware-brya-14505.B TEST= Use 'iotools rdmsr [cpu id] 0x774' command and check field 32:24 = 0x73. Signed-off-by: Cliff Huang <cliff.huang@intel.corp-partner.google.com> Change-Id: I973cfec72a0be24c56c4cd3283d2fe6e18400d02 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62655 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
index 0558307f1c..d67fd4b7a2 100644
--- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
@@ -119,6 +119,10 @@ chip soc/intel/alderlake
},
}"
+ # set EPP to 45%: 45 * 256/100 = 115 = 0x73
+ register "enable_energy_perf_pref" = "true"
+ register "energy_perf_pref_value" = "0x73"
+
device domain 0 on
device ref igpu on end
device ref dtt on end