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authorElyes HAOUAS <ehaouas@noos.fr>2021-02-05 20:10:24 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2021-02-10 18:02:42 +0000
commit93329d8189ad5b4447d748a1b0390cf4ac2a22d3 (patch)
tree873a13aaa142a46d05237a0457c2732d7786b023 /src
parent9edeb31d4a9e3339c71b53e80de93ce7cea037a5 (diff)
soc/intel/xeon_sp/include/soc/acpi_asl.h: Convert to ASL 2.0
Change-Id: Ie1d31b9d02584b97b85afe970894cfe557174733 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50324 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/xeon_sp/include/soc/acpi_asl.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/xeon_sp/include/soc/acpi_asl.h b/src/soc/intel/xeon_sp/include/soc/acpi_asl.h
index e08e02be35..befce2e1b8 100644
--- a/src/soc/intel/xeon_sp/include/soc/acpi_asl.h
+++ b/src/soc/intel/xeon_sp/include/soc/acpi_asl.h
@@ -44,22 +44,22 @@
IRQ (Level, ActiveLow, Shared) {} \
}) \
CreateWordField (RTLA, 1, IRQ0) \
- Store (Zero, IRQ0) \
+ IRQ0 = 0 \
\
/* Set the bit from PIRQ Routing Register */ \
- ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \
+ IRQ0 = 1 << (^^PIR##id & ^^IREM) \
Return (RTLA) \
} \
Method (_SRS, 1, Serialized) \
{ \
CreateWordField (Arg0, 1, IRQ0) \
FindSetRightBit (IRQ0, Local0) \
- Decrement (Local0) \
- Store (Local0, ^^PIR##id) \
+ Local0-- \
+ ^^PIR##id = Local0 \
} \
Method (_STA, 0, Serialized) \
{ \
- If (And (^^PIR##id, ^^IREN)) { \
+ If (^^PIR##id & ^^IREN) { \
Return (0x9) \
} Else { \
Return (0xb) \
@@ -67,7 +67,7 @@
} \
Method (_DIS, 0, Serialized) \
{ \
- Or (^^PIR##id, ^^IREN, ^^PIR##id) \
+ ^^PIR##id |= ^^IREN \
} \
}