diff options
| author | Yuchi Chen <yuchi.chen@intel.com> | 2024-06-25 10:56:10 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-08-11 17:32:29 +0000 |
| commit | 933031b524ec1a25dd01c9514d97919fc530f728 (patch) | |
| tree | 269be0a56ea2167125be696baeea0f4602678258 /src | |
| parent | eb28f3da7de7f1ba0203046c00254fb602080ab0 (diff) | |
soc/intel/common/block/gpmr: Allow soc to have specific gpmr definition
This patch add a new Kconfig HAVE_SPECIFIC_GPMR and use it to include
soc/gpmr.h if necessary.
Change-Id: I94797a72af75fc96ab2cacb1d46b581605a15387
Signed-off-by: Yuchi Chen <yuchi.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83317
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/common/block/gpmr/Kconfig | 10 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/pcr_gpmr.h | 6 |
2 files changed, 16 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/gpmr/Kconfig b/src/soc/intel/common/block/gpmr/Kconfig index 06ababe50e..313b0ccb53 100644 --- a/src/soc/intel/common/block/gpmr/Kconfig +++ b/src/soc/intel/common/block/gpmr/Kconfig @@ -5,3 +5,13 @@ config SOC_INTEL_COMMON_BLOCK_GPMR select SOC_INTEL_COMMON_BLOCK_PCR help Intel Processor common GPMR support + +if SOC_INTEL_COMMON_BLOCK_GPMR + +config USE_SOC_GPMR_DEFS + bool + default n + help + Specify if the SoC have specific GPMR register definitions. + +endif diff --git a/src/soc/intel/common/block/include/intelblocks/pcr_gpmr.h b/src/soc/intel/common/block/include/intelblocks/pcr_gpmr.h index fb138f91a0..98ee837fd4 100644 --- a/src/soc/intel/common/block/include/intelblocks/pcr_gpmr.h +++ b/src/soc/intel/common/block/include/intelblocks/pcr_gpmr.h @@ -3,6 +3,10 @@ #ifndef SOC_INTEL_COMMON_BLOCK_PCR_GPMR_H #define SOC_INTEL_COMMON_BLOCK_PCR_GPMR_H +#if CONFIG(USE_SOC_GPMR_DEFS) +#include <soc/pcr_gpmr.h> +#else + #define GPMR_LPCLGIR1 0x2730 #define GPMR_DMICTL 0x2234 #define GPMR_DMICTL_SRLOCK (1 << 31) @@ -24,4 +28,6 @@ #define GPMR_DID_OFFSET(x) (0x2780 + (x) * 8) #define GPMR_EN BIT(31) +#endif + #endif /* SOC_INTEL_COMMON_BLOCK_PCR_GPMR_H */ |