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authorElyes Haouas <ehaouas@noos.fr>2023-07-09 10:26:07 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-08-09 22:01:44 +0000
commit8e9906c19abf91d20a75ac24cfc7bd5637c2fbb5 (patch)
tree8c950e2c3273bfefea938f98f1d26e3af0836650 /src
parent0648267c1a77d3f3f41547ede3a19a832842cf6e (diff)
treewide: Get rid of "NO_DDRx" selection
Change-Id: I8fa26e7a398eee855c31a76f0f89b4111368c2a6 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76387 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/device/dram/Kconfig36
-rw-r--r--src/northbridge/amd/pi/00730F01/Kconfig4
-rw-r--r--src/northbridge/intel/e7505/Kconfig5
-rw-r--r--src/northbridge/intel/gm45/Kconfig3
-rw-r--r--src/northbridge/intel/haswell/Kconfig4
-rw-r--r--src/northbridge/intel/i440bx/Kconfig5
-rw-r--r--src/northbridge/intel/i945/Kconfig4
-rw-r--r--src/northbridge/intel/ironlake/Kconfig4
-rw-r--r--src/northbridge/intel/pineview/Kconfig3
-rw-r--r--src/northbridge/intel/sandybridge/Kconfig4
-rw-r--r--src/northbridge/intel/x4x/Kconfig3
-rw-r--r--src/soc/amd/cezanne/Kconfig3
-rw-r--r--src/soc/amd/glinda/Kconfig4
-rw-r--r--src/soc/amd/mendocino/Kconfig4
-rw-r--r--src/soc/amd/phoenix/Kconfig4
-rw-r--r--src/soc/amd/picasso/Kconfig4
-rw-r--r--src/soc/amd/stoneyridge/Kconfig4
-rw-r--r--src/soc/intel/baytrail/Kconfig4
18 files changed, 5 insertions, 97 deletions
diff --git a/src/device/dram/Kconfig b/src/device/dram/Kconfig
index 7bb1dab50d..b9b5de4f6d 100644
--- a/src/device/dram/Kconfig
+++ b/src/device/dram/Kconfig
@@ -1,57 +1,31 @@
## SPDX-License-Identifier: GPL-2.0-only
-# Short-term plan: Start adding 'USE_' and "NO_" options to each chip.
-#
-# Long-term plan: Every SoC or chipset should select the memory types they
-# use. When they all select their memory, the 'no_' options can be removed
-# and the defaults for all memory types can be set to n.
-
-config NO_DDR5
- bool
-
-config NO_LPDDR4
- bool
-
-config NO_DDR4
- bool
-
-config NO_DDR3
- bool
-
-config NO_DDR2
- bool
-
config USE_DDR5
bool
- default n if NO_DDR5
- default y
+ default n
help
system supports DDR5 memory
config USE_LPDDR4
bool
- default n if NO_LPDDR4
- default y
+ default n
help
system supports LPDDR4 memory
config USE_DDR4
bool
- default n if NO_DDR4
- default y
+ default n
help
system supports DDR4 memory
config USE_DDR3
bool
- default n if NO_DDR3
- default y
+ default n
help
system supports DDR3 memory
config USE_DDR2
bool
- default n if NO_DDR2
- default y
+ default n
help
system supports DDR2 memory
diff --git a/src/northbridge/amd/pi/00730F01/Kconfig b/src/northbridge/amd/pi/00730F01/Kconfig
index 360fd8f0c1..651735a5c9 100644
--- a/src/northbridge/amd/pi/00730F01/Kconfig
+++ b/src/northbridge/amd/pi/00730F01/Kconfig
@@ -2,11 +2,7 @@
config NORTHBRIDGE_AMD_PI_00730F01
bool
- select NO_DDR5
- select NO_LPDDR4
- select NO_DDR4
select USE_DDR3
- select NO_DDR2
if NORTHBRIDGE_AMD_PI_00730F01
diff --git a/src/northbridge/intel/e7505/Kconfig b/src/northbridge/intel/e7505/Kconfig
index adb011594a..e60ab337c5 100644
--- a/src/northbridge/intel/e7505/Kconfig
+++ b/src/northbridge/intel/e7505/Kconfig
@@ -5,9 +5,4 @@ config NORTHBRIDGE_INTEL_E7505
select NO_ECAM_MMCONF_SUPPORT
select HAVE_DEBUG_RAM_SETUP
select NO_CBFS_MCACHE
- select NO_DDR5
- select NO_LPDDR4
- select NO_DDR4
- select NO_DDR3
- select NO_DDR2
select SMM_TSEG
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index 39e15adf6d..2a266b9771 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -8,9 +8,6 @@ config NORTHBRIDGE_INTEL_GM45
select INTEL_GMA_ACPI
select INTEL_GMA_SSC_ALTERNATE_REF
select HAVE_EXP_X86_64_SUPPORT
- select NO_DDR5
- select NO_LPDDR4
- select NO_DDR4
select USE_DDR3
select USE_DDR2
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index d1c9ec20fc..4b83a25bc1 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -6,10 +6,6 @@ config NORTHBRIDGE_INTEL_HASWELL
select CACHE_MRC_SETTINGS
select INTEL_DDI
select INTEL_GMA_ACPI
- select NO_DDR5
- select NO_LPDDR4
- select NO_DDR2
- select NO_DDR4
select USE_DDR3
if NORTHBRIDGE_INTEL_HASWELL
diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig
index 8908cea902..7b41f05c3a 100644
--- a/src/northbridge/intel/i440bx/Kconfig
+++ b/src/northbridge/intel/i440bx/Kconfig
@@ -5,11 +5,6 @@ config NORTHBRIDGE_INTEL_I440BX
select NO_ECAM_MMCONF_SUPPORT
select HAVE_DEBUG_RAM_SETUP
select NO_CBFS_MCACHE
- select NO_DDR5
- select NO_LPDDR4
- select NO_DDR4
- select NO_DDR3
- select NO_DDR2
config SDRAMPWR_4DIMM
bool
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index 33fb184eb1..9c1a111456 100644
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -8,10 +8,6 @@ config NORTHBRIDGE_INTEL_I945
select INTEL_GMA_SSC_ALTERNATE_REF
select INTEL_EDID
select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
- select NO_DDR5
- select NO_LPDDR4
- select NO_DDR4
- select NO_DDR3
select USE_DDR2
if NORTHBRIDGE_INTEL_I945
diff --git a/src/northbridge/intel/ironlake/Kconfig b/src/northbridge/intel/ironlake/Kconfig
index 678e73a45a..502b99b36c 100644
--- a/src/northbridge/intel/ironlake/Kconfig
+++ b/src/northbridge/intel/ironlake/Kconfig
@@ -8,10 +8,6 @@ config NORTHBRIDGE_INTEL_IRONLAKE
select INTEL_GMA_ACPI
select CACHE_MRC_SETTINGS
select HAVE_DEBUG_RAM_SETUP
- select NO_DDR5
- select NO_LPDDR4
- select NO_DDR4
- select NO_DDR2
select USE_DDR3
if NORTHBRIDGE_INTEL_IRONLAKE
diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig
index 5714b4f427..c652209c26 100644
--- a/src/northbridge/intel/pineview/Kconfig
+++ b/src/northbridge/intel/pineview/Kconfig
@@ -8,9 +8,6 @@ config NORTHBRIDGE_INTEL_PINEVIEW
select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
select INTEL_EDID if MAINBOARD_DO_NATIVE_VGA_INIT
select INTEL_GMA_ACPI
- select NO_DDR5
- select NO_LPDDR4
- select NO_DDR4
select USE_DDR3
select USE_DDR2
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index 384d5bc8d9..01aa11c27c 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -6,10 +6,6 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE
select CPU_INTEL_MODEL_206AX
select HAVE_DEBUG_RAM_SETUP
select INTEL_GMA_ACPI
- select NO_DDR5
- select NO_LPDDR4
- select NO_DDR4
- select NO_DDR2
select USE_DDR3
if NORTHBRIDGE_INTEL_SANDYBRIDGE
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
index aef9eb4fa4..248852e2e9 100644
--- a/src/northbridge/intel/x4x/Kconfig
+++ b/src/northbridge/intel/x4x/Kconfig
@@ -8,9 +8,6 @@ config NORTHBRIDGE_INTEL_X4X
select CACHE_MRC_SETTINGS
select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
select HAVE_EXP_X86_64_SUPPORT
- select NO_DDR5
- select NO_LPDDR4
- select NO_DDR4
select USE_DDR3
select USE_DDR2
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index e861c14487..2c6e9497c4 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -17,9 +17,6 @@ config SOC_AMD_CEZANNE
select HAVE_FSP_GOP
select HAVE_SMI_HANDLER
select IDT_IN_EVERY_STAGE
- select NO_DDR5
- select NO_DDR3
- select NO_DDR2
select PARALLEL_MP_AP_WORK
select PLATFORM_USES_FSP2_0
select PROVIDES_ROM_SHARING
diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig
index fe20591f05..f76f27e5d6 100644
--- a/src/soc/amd/glinda/Kconfig
+++ b/src/soc/amd/glinda/Kconfig
@@ -20,10 +20,6 @@ config SOC_AMD_GLINDA
select HAVE_FSP_GOP
select HAVE_SMI_HANDLER
select IDT_IN_EVERY_STAGE
- select NO_DDR4
- select NO_DDR3
- select NO_DDR2
- select NO_LPDDR4
select PARALLEL_MP_AP_WORK
select PLATFORM_USES_FSP2_0
select PROVIDES_ROM_SHARING
diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig
index 6f3c0ca484..189c6b9be9 100644
--- a/src/soc/amd/mendocino/Kconfig
+++ b/src/soc/amd/mendocino/Kconfig
@@ -18,10 +18,6 @@ config SOC_AMD_REMBRANDT_BASE
select HAVE_FSP_GOP
select HAVE_SMI_HANDLER
select IDT_IN_EVERY_STAGE
- select NO_DDR4
- select NO_DDR3
- select NO_DDR2
- select NO_LPDDR4
select PARALLEL_MP_AP_WORK
select PLATFORM_USES_FSP2_0
select PROVIDES_ROM_SHARING
diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig
index 5f4e5d174e..b506464928 100644
--- a/src/soc/amd/phoenix/Kconfig
+++ b/src/soc/amd/phoenix/Kconfig
@@ -21,10 +21,6 @@ config SOC_AMD_PHOENIX
select HAVE_FSP_GOP
select HAVE_SMI_HANDLER
select IDT_IN_EVERY_STAGE
- select NO_DDR4
- select NO_DDR3
- select NO_DDR2
- select NO_LPDDR4
select PARALLEL_MP_AP_WORK
select PLATFORM_USES_FSP2_0
select PROVIDES_ROM_SHARING
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 33375bd569..9051b437cb 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -16,10 +16,6 @@ config SOC_AMD_PICASSO
select HAVE_EM100_SUPPORT
select HAVE_SMI_HANDLER
select IDT_IN_EVERY_STAGE
- select NO_DDR5
- select NO_DDR3
- select NO_DDR2
- select NO_LPDDR4
select PARALLEL_MP_AP_WORK
select PLATFORM_USES_FSP2_0
select PROVIDES_ROM_SHARING
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 0eeef09ec3..6091dce1e4 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -11,10 +11,6 @@ config SOC_AMD_STONEYRIDGE
select HAVE_CF9_RESET
select HAVE_SMI_HANDLER
select HAVE_USBDEBUG_OPTIONS
- select NO_DDR5
- select NO_DDR3
- select NO_DDR2
- select NO_LPDDR4
select PARALLEL_MP_AP_WORK
select RTC
select SOC_AMD_PI
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 7cacdc0909..f3c914c7ef 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -37,11 +37,7 @@ config CPU_SPECIFIC_OPTIONS
select CPU_INTEL_COMMON
select CPU_HAS_L2_ENABLE_MSR
select TCO_SPACE_NOT_YET_SPLIT
- select NO_DDR5
- select NO_LPDDR4
- select NO_DDR4
select USE_DDR3
- select NO_DDR2
config VBOOT
select VBOOT_MUST_REQUEST_DISPLAY