diff options
author | Kapil Porwal <kapilporwal@google.com> | 2023-07-04 03:11:15 +0000 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2023-07-05 04:23:14 +0000 |
commit | 8c551cbe72dbd94b46c176972f2a12619bbe04e8 (patch) | |
tree | 2cc94bb0c8750f78a0d1a4075b0ef65cfddfa799 /src | |
parent | 28d18ade43800a08d7fdb2859668e3ae7088abb1 (diff) |
mb/google/rex: Temporarily disable the crashlog
Currently, boards with ES2 silicon are unable to boot with crashlog
enabled because crashlog driver is unable to handle invalid data.
Temporarily disable the crashlog to unblock development until the issue
is fixed.
BUG=b:289749310
TEST=Able to boot to the OS on Screebo
Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: Ic63cf9cf5bfa2c92d8f2c5b13df2f23dc118b389
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76231
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/rex/Kconfig | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig index c3e3ef4dfe..dcdc0d9e8f 100644 --- a/src/mainboard/google/rex/Kconfig +++ b/src/mainboard/google/rex/Kconfig @@ -38,7 +38,6 @@ config BOARD_GOOGLE_BASEBOARD_REX select HAVE_SLP_S0_GATE select MAINBOARD_HAS_CHROMEOS select MEMORY_SOLDERDOWN - select SOC_INTEL_CRASHLOG select SOC_INTEL_IOE_DIE_SUPPORT select SOC_INTEL_METEORLAKE_U_H select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES @@ -53,7 +52,6 @@ config BOARD_GOOGLE_BASEBOARD_OVIS select HAVE_SLP_S0_GATE select MAINBOARD_HAS_CHROMEOS select MEMORY_SOLDERDOWN - select SOC_INTEL_CRASHLOG select SOC_INTEL_IOE_DIE_SUPPORT select SOC_INTEL_METEORLAKE_U_H select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES |