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authorMario Scheithauer <mario.scheithauer@siemens.com>2024-05-27 11:09:49 +0200
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-05-30 13:02:55 +0000
commit8c3cf9eacee7c55c800f423059186709d923854e (patch)
tree058145e50fee9db40e9a7a0f58950d553411cfda /src
parent29f1b791270b05cad7b94ed2d9d8edfb0460e12f (diff)
mb/siemens/mc_ehl5: Remove DDI settings from devicetree
Since this mainboard no longer uses the FSP GOP driver, the DDI port settings are no longer necessary. The GOP driver was used in the initial phase of development where we used Tianocore as payload for some test cases. Finally, this mainboard uses a self-made Linux payload, which does the graphic initialization. BUG=none TEST=Boot into Linux and check if graphic works correctly Change-Id: Ie9e135fbc2627546d6ef95d7d5ff3e9a9222b5d2 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82663 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Uwe Poeche <uwe.poeche@siemens.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb
index 43697beab8..8fe9b93dd1 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb
@@ -103,9 +103,6 @@ chip soc/intel/elkhartlake
register "pse_tsn_phy_irq_edge[0]" = "RISING_EDGE"
register "pse_tsn_phy_irq_edge[1]" = "RISING_EDGE"
- register "DdiPortAHpd" = "1"
- register "DdiPortADdc" = "1"
-
register "common_soc_config" = "{
.i2c[1] = {
.speed = I2C_SPEED_STANDARD,