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authorNick Vaccaro <nvaccaro@google.com>2018-09-29 14:54:44 -0700
committerPatrick Georgi <pgeorgi@google.com>2018-10-04 09:45:19 +0000
commit8b6f8cc1aca3a80068d1013c6b7c316fec16cbd2 (patch)
tree9a2bef9f703ce656935e8dfb5768a7211d2968e5 /src
parent3cb0e278e5fb7eda075b199638ea479c931c249b (diff)
mb/google/poppy/variant/nocturne: increase touchscreen reset delay
Increase the reset delay for the touchscreen to 10 ms. BUG=b:116857433 TEST='emerge-nocturne coreboot chromeos-bootimage', flash and boot nocturne to kernel, log in and execute the following two commands: echo "i2c-WCOM50C1:00" > /sys/bus/i2c/drivers/i2c_hid/unbind echo "i2c-WCOM50C1:00" > /sys/bus/i2c/drivers/i2c_hid/bind and verify the bind command does not echo back a "-bash: echo: write error: No such device" error. Change-Id: I102b57ea5a10d22bee6d4f7c6f114b380a5d586b Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/28803 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Caveh Jalali <caveh@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/poppy/variants/nocturne/devicetree.cb3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
index 70a379c799..df63a91fb3 100644
--- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
@@ -291,10 +291,11 @@ chip soc/intel/skylake
register "generic.speed" = "I2C_SPEED_FAST_PLUS"
register "generic.probed" = "1"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E11)"
- register "generic.reset_delay_ms" = "1"
+ register "generic.reset_delay_ms" = "10"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
+ register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x1"
device i2c 0a on end
end