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authorMeera Ravindranath <meera.ravindranath@intel.com>2021-08-31 10:40:29 +0530
committerFelix Held <felix-coreboot@felixheld.de>2021-09-14 14:04:30 +0000
commit89356d142bc4678e8aa030b298faa42396f20795 (patch)
tree54c632b22a43285960664395d2469aa71960145d /src
parent48e7d4902008eb5b9fd8ea793c88b2f8a1135c69 (diff)
mb/intel/adlrvp_p: Enable TCSS USB ports device path
TEST=Boot RVP, ensure Type C ports operate correctly. Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com> Change-Id: Iadc0df2e6e29a5afbcbb7db1ae0be6546dbcdc1a Reviewed-on: https://review.coreboot.org/c/coreboot/+/57274 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb
index bfc899110e..e78d00fa7f 100644
--- a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb
+++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb
@@ -9,6 +9,25 @@ chip soc/intel/alderlake
device pnp 0c09.0 on end
end
end
+ device ref tcss_xhci on
+ chip drivers/usb/acpi
+ register "type" = "UPC_TYPE_HUB"
+ device ref tcss_root_hub on
+ chip drivers/usb/acpi
+ register "desc" = ""TypeC Port 1""
+ device ref tcss_usb3_port1 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""TypeC Port 2""
+ device ref tcss_usb3_port2 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""TypeC Port 3""
+ device ref tcss_usb3_port3 on end
+ end
+ end
+ end
+ end
device ref pmc hidden
# The pmc_mux chip driver is a placeholder for the
# PMC.MUX device in the ACPI hierarchy.