diff options
author | Tyler Wang <tyler.wang@quanta.corp-partner.google.com> | 2022-06-01 17:11:05 +0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-09 13:34:49 +0000 |
commit | 880b917dc468b8dd4a48ac06a41bd2749907e38c (patch) | |
tree | bfb3222b358853397adb8da7097111691d77d4a5 /src | |
parent | 54f83c90b051b1ae84de2abb12ca4a8df1b35412 (diff) |
mb/google/nissa/var/craask: Generate SPD ID for supported memory part
Add craaskbowl supported memory parts in mem_parts_used.txt, generate
SPD id for this part.
1. Samsung K3LKBKB0BM-MGCP
2. Hynix H9JCNNNCP3MLYR-N6E
BUG=b:235134420
TEST=Use part_id_gen to generate related settings
Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Change-Id: I5f6d1b1b988468d0918df20a34a3145af30a65d2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64858
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
3 files changed, 8 insertions, 3 deletions
diff --git a/src/mainboard/google/brya/variants/craask/memory/Makefile.inc b/src/mainboard/google/brya/variants/craask/memory/Makefile.inc index ce6db2379f..34d01a6f5f 100644 --- a/src/mainboard/google/brya/variants/craask/memory/Makefile.inc +++ b/src/mainboard/google/brya/variants/craask/memory/Makefile.inc @@ -1,9 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/craask/memory src/mainboard/google/brya/variants/craask/memory/mem_parts_used.txt +# util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/craask/memory/ src/mainboard/google/brya/variants/craask/memory/mem_parts_used.txt SPD_SOURCES = -SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 0(0b0000) Parts = MT62F1G32D4DR-031 WT:B +SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 0(0b0000) Parts = MT62F1G32D4DR-031 WT:B, H9JCNNNCP3MLYR-N6E SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 1(0b0001) Parts = MT62F512M32D2DR-031 WT:B, H9JCNNNBK3MLYR-N6E SPD_SOURCES += spd/lp5/set-0/spd-5.hex # ID = 2(0b0010) Parts = K3LKLKL0EM-MGCN +SPD_SOURCES += spd/lp5/set-0/spd-3.hex # ID = 3(0b0011) Parts = K3LKBKB0BM-MGCP diff --git a/src/mainboard/google/brya/variants/craask/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/craask/memory/dram_id.generated.txt index ecce170d95..e17b510c58 100644 --- a/src/mainboard/google/brya/variants/craask/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/craask/memory/dram_id.generated.txt @@ -1,10 +1,12 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/craask/memory src/mainboard/google/brya/variants/craask/memory/mem_parts_used.txt +# util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/craask/memory/ src/mainboard/google/brya/variants/craask/memory/mem_parts_used.txt DRAM Part Name ID to assign MT62F1G32D4DR-031 WT:B 0 (0000) MT62F512M32D2DR-031 WT:B 1 (0001) H9JCNNNBK3MLYR-N6E 1 (0001) K3LKLKL0EM-MGCN 2 (0010) +K3LKBKB0BM-MGCP 3 (0011) +H9JCNNNCP3MLYR-N6E 0 (0000) diff --git a/src/mainboard/google/brya/variants/craask/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/craask/memory/mem_parts_used.txt index 58c69966f2..a3368e99f3 100644 --- a/src/mainboard/google/brya/variants/craask/memory/mem_parts_used.txt +++ b/src/mainboard/google/brya/variants/craask/memory/mem_parts_used.txt @@ -13,3 +13,5 @@ MT62F1G32D4DR-031 WT:B MT62F512M32D2DR-031 WT:B H9JCNNNBK3MLYR-N6E K3LKLKL0EM-MGCN +K3LKBKB0BM-MGCP +H9JCNNNCP3MLYR-N6E |