summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorKarthikeyan Ramasubramanian <kramasub@google.com>2021-02-25 00:29:14 -0700
committerPatrick Georgi <pgeorgi@google.com>2021-02-27 09:38:02 +0000
commit867288490a74c576e255057abb3d02c43e50369e (patch)
tree2cd3739b35911c00fc6bb94e6bd3468ca1d005aa /src
parenta904fd6173c8d11e595dfca135d965a85729e0b4 (diff)
ec/google/chromeec: Optionally include SSFC in firmware config
Fetch second source factory cache configuration (SSFC) as an optional element to the firmware config interface. Introduce a Kconfig so that it can be enabled and used on required mainboards. BUG=b:177055126 TEST=Build and Boot to OS in Magolor. Change-Id: I81137406d21e77b5d58a33f66778e13cf16c85c7 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51094 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/ec/google/chromeec/Kconfig7
-rw-r--r--src/ec/google/chromeec/ec.c13
2 files changed, 19 insertions, 1 deletions
diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig
index 638c011a58..4bb0d65c86 100644
--- a/src/ec/google/chromeec/Kconfig
+++ b/src/ec/google/chromeec/Kconfig
@@ -197,4 +197,11 @@ config EC_GOOGLE_CHROMEEC_SWITCHES
Enable support for Chrome OS mode switches provided by the Chrome OS
EC.
+config EC_GOOGLE_CHROMEEC_INCLUDE_SSFC_IN_FW_CONFIG
+ depends on FW_CONFIG_SOURCE_CHROMEEC_CBI
+ bool
+ help
+ Fetch Second Source Factory Cache from CBI EEPROM and add it in the most significant
+ 32 bits of firmware configuration.
+
source "src/ec/google/chromeec/*/Kconfig"
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c
index 0915833b91..affe66ef8f 100644
--- a/src/ec/google/chromeec/ec.c
+++ b/src/ec/google/chromeec/ec.c
@@ -848,8 +848,19 @@ int google_chromeec_cbi_get_fw_config(uint64_t *fw_config)
if (cbi_get_uint32(&config, CBI_TAG_FW_CONFIG))
return -1;
- /* FIXME: Yet to determine source of other 32 bits... */
*fw_config = (uint64_t)config;
+ /*
+ * If SSFC is configured to be part of FW_CONFIG, add it at the most significant
+ * 32 bits.
+ */
+ if (CONFIG(EC_GOOGLE_CHROMEEC_INCLUDE_SSFC_IN_FW_CONFIG)) {
+ uint32_t ssfc;
+
+ if (google_chromeec_cbi_get_ssfc(&ssfc))
+ return -1;
+
+ *fw_config |= (uint64_t)ssfc << 32;
+ }
return 0;
}