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authorAngel Pons <th3fanbus@gmail.com>2021-02-11 13:18:45 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-03-27 18:36:05 +0000
commit84ec70312e977355c8bac4be575c5808797da04d (patch)
tree1f7acc43b41794e681a6957d7412cee9d0ff79d1 /src
parent927fa6d04c0c4f61140bd680c1bd8e06191ea407 (diff)
mb/intel/dcp847ske: Drop useless MCHBAR writes
There's no need to write the GDCRTRAININGRESULT registers after raminit. Change-Id: If604920fe7a3bee96f72f8aff5e96f0e25548f18 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50534 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/dcp847ske/early_southbridge.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c
index d09da01401..92d49c1a2b 100644
--- a/src/mainboard/intel/dcp847ske/early_southbridge.c
+++ b/src/mainboard/intel/dcp847ske/early_southbridge.c
@@ -9,14 +9,6 @@
#include "superio.h"
#include "thermal.h"
-void mainboard_late_rcba_config(void)
-{
- /* Set "mobile" bit in MCH (which makes sense layout-wise). */
- /* Note sure if this has any effect at all though. */
- MCHBAR32(0x0004) |= 0x00001000;
- MCHBAR32(0x0104) |= 0x00001000;
-}
-
static const u16 hwm_initvals[] = {
HWM_BANK(0),
HWM_INITVAL(0xae, 0x01), /* Enable PECI Agent0 */