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authorFelix Held <felix-coreboot@felixheld.de>2023-07-14 18:41:23 +0200
committerMartin L Roth <gaumless@gmail.com>2023-07-17 03:25:00 +0000
commit8336c72524a975564baccc1bf68d65dcfed61597 (patch)
treea93bc4a9a421d7d4dd0aeefb86dcee699e68cf1f /src
parent9c0bce5f28a703aa9f7d777acc3ed35651ce2115 (diff)
soc/amd/glinda/early_fch: don't call enable_acpimmio_decode_pm04
The enable_acpimmio_decode_pm04 function uses the IO port based indirect access of the PM register space. The PM_INDEX and PM_DATA registers don't exist any more on Glinda, so the code shouldn't access those. Since the PM_04_ACPIMMIO_DECODE_EN bit in the ACPIMMIO_DECODE_REGISTER_04 register is 1 after reset, the ACPIMMIO space is still accessible. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ic6bc0479ea4ea2b9fe3629a6e15940b31b2864d3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76456 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/glinda/early_fch.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/soc/amd/glinda/early_fch.c b/src/soc/amd/glinda/early_fch.c
index f504f79176..1d629a7ae0 100644
--- a/src/soc/amd/glinda/early_fch.c
+++ b/src/soc/amd/glinda/early_fch.c
@@ -19,9 +19,12 @@
/* Before console init */
void fch_pre_init(void)
{
- /* Enable_acpimmio_decode_pm04 to enable the ACPIMMIO decode which is needed to access
- the GPIO registers. */
- enable_acpimmio_decode_pm04();
+ /*
+ * PM_04_ACPIMMIO_DECODE_EN which enables the ACPIMMIO decode is already set after
+ * reset. Since the IO port based indirect PM register space access isn't implemented
+ * in Phoenix any more, don't call enable_acpimmio_decode_pm04() which uses the
+ * indirect PM register space access via the IO ports that aren't implemented any more.
+ */
/* Setup SPI base by calling lpc_early_init before setting up eSPI. */
lpc_early_init();