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authorShaik Sajida Bhanu <sbhanu@codeaurora.org>2021-08-30 12:09:46 +0530
committerJulius Werner <jwerner@chromium.org>2021-09-16 17:16:14 +0000
commit7bf3d0cbd8c36504795be940acdab9b78c5afa31 (patch)
tree24457a16adcc2ab29c0d5c4917c498b7c69d370b /src
parente3cf008d88447b8a9ee3c08f755dcee4ada80a77 (diff)
mainboard/google: Update the TLMM registers for sdhc
Update the TLMM register values for eMMC and SD card on Trogdor, Herobrine and Mistral boards. BUG=b:196936525 TEST=Validated on qualcomm sc7280 and sc7180 development board and checked basic boot up. Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org> Change-Id: Iccdb7757027c6de424a82e4374bad802501ac83c Reviewed-on: https://review.coreboot.org/c/coreboot/+/57450 Reviewed-by: Shelley Chen <shchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/herobrine/mainboard.c10
-rw-r--r--src/mainboard/google/mistral/mainboard.c9
-rw-r--r--src/mainboard/google/trogdor/mainboard.c11
-rw-r--r--src/soc/qualcomm/qcs405/include/soc/addressmap.h3
-rw-r--r--src/soc/qualcomm/sc7180/include/soc/addressmap.h4
-rw-r--r--src/soc/qualcomm/sc7280/include/soc/addressmap.h4
6 files changed, 41 insertions, 0 deletions
diff --git a/src/mainboard/google/herobrine/mainboard.c b/src/mainboard/google/herobrine/mainboard.c
index dc60e6e2c4..6f8d19d8d1 100644
--- a/src/mainboard/google/herobrine/mainboard.c
+++ b/src/mainboard/google/herobrine/mainboard.c
@@ -6,15 +6,25 @@
#include <soc/clock.h>
#include <console/console.h>
#include <device/device.h>
+#include <device/mmio.h>
#include <bootblock_common.h>
#include <soc/clock.h>
+static void configure_sdhci(void)
+{
+ /* Program eMMC drive strength to 16/10/10 mA */
+ write32((void *)SDC1_TLMM_CFG_ADDR, 0x9FE4);
+ /* Program SD card drive strength to 16/10/10 mA */
+ write32((void *)SDC2_TLMM_CFG_ADDR, 0x1FE4);
+}
+
static void mainboard_init(struct device *dev)
{
/* Configure clock for eMMC */
clock_configure_sdcc(1, 384 * MHz);
/* Configure clock for SD card */
clock_configure_sdcc(2, 50 * MHz);
+ configure_sdhci();
}
static void mainboard_enable(struct device *dev)
diff --git a/src/mainboard/google/mistral/mainboard.c b/src/mainboard/google/mistral/mainboard.c
index 804afb4135..e45ff8fef6 100644
--- a/src/mainboard/google/mistral/mainboard.c
+++ b/src/mainboard/google/mistral/mainboard.c
@@ -1,8 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/device.h>
+#include <device/mmio.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/usb.h>
+#include <soc/addressmap.h>
static struct usb_board_data usb1_board_data = {
.parameter_override_x0 = 0x63,
@@ -17,6 +19,12 @@ static void setup_usb(void)
setup_usb_host(HSUSB_HS_PORT_1, &usb1_board_data);
}
+static void configure_sdhci(void)
+{
+ /* Program eMMC drive strength to 16/10/10 mA */
+ write32((void *)SDC1_TLMM_CFG_ADDR, 0x9FE4);
+}
+
static void mainboard_init(struct device *dev)
{
/* Copy WIFI calibration data into CBMEM. */
@@ -24,6 +32,7 @@ static void mainboard_init(struct device *dev)
cbmem_add_vpd_calibration_data();
setup_usb();
+ configure_sdhci();
}
static void mainboard_enable(struct device *dev)
diff --git a/src/mainboard/google/trogdor/mainboard.c b/src/mainboard/google/trogdor/mainboard.c
index 41bef2b3e7..982c1c1dae 100644
--- a/src/mainboard/google/trogdor/mainboard.c
+++ b/src/mainboard/google/trogdor/mainboard.c
@@ -6,6 +6,7 @@
#include <delay.h>
#include <device/device.h>
#include <device/i2c_simple.h>
+#include <device/mmio.h>
#include <mipi/panel.h>
#include <drivers/ti/sn65dsi86bridge/sn65dsi86bridge.h>
#include <edid.h>
@@ -19,6 +20,7 @@
#include <types.h>
#include "board.h"
+#include <soc/addressmap.h>
#define BRIDGE_BUS 0x2
#define BRIDGE_CHIP 0x2d
@@ -202,6 +204,14 @@ static void display_startup(void)
}
}
+static void configure_sdhci(void)
+{
+ /* Program eMMC drive strength to 16/16/16 mA */
+ write32((void *)SDC1_TLMM_CFG_ADDR, 0x9FFF);
+ /* Program SD card drive strength to 16/10/10 mA */
+ write32((void *)SDC2_TLMM_CFG_ADDR, 0x1FE4);
+}
+
static void mainboard_init(struct device *dev)
{
/* Take FPMCU out of reset. Power was already applied
@@ -213,6 +223,7 @@ static void mainboard_init(struct device *dev)
qi2s_configure_gpios();
load_qup_fw();
display_startup();
+ configure_sdhci();
}
static void mainboard_enable(struct device *dev)
diff --git a/src/soc/qualcomm/qcs405/include/soc/addressmap.h b/src/soc/qualcomm/qcs405/include/soc/addressmap.h
index b21ae26b71..637a059b07 100644
--- a/src/soc/qualcomm/qcs405/include/soc/addressmap.h
+++ b/src/soc/qualcomm/qcs405/include/soc/addressmap.h
@@ -9,4 +9,7 @@
#define TLMM_SOUTH_TILE_BASE 0x1000000
#define GCC_BASE 0x01800000
+/* SDHC TLMM Registers */
+#define SDC1_TLMM_CFG_ADDR 0x010C2000
+
#endif /* __SOC_QUALCOMM_QCS405_ADDRESS_MAP_H__ */
diff --git a/src/soc/qualcomm/sc7180/include/soc/addressmap.h b/src/soc/qualcomm/sc7180/include/soc/addressmap.h
index e360e8a30e..f295ceea22 100644
--- a/src/soc/qualcomm/sc7180/include/soc/addressmap.h
+++ b/src/soc/qualcomm/sc7180/include/soc/addressmap.h
@@ -56,4 +56,8 @@
#define GPIO_FUNC_QSPI_DATA_1 GPIO65_FUNC_QSPI_DATA_1
#define GPIO_FUNC_QSPI_CLK GPIO63_FUNC_QSPI_CLK
+/* SDHC TLMM Registers */
+#define SDC1_TLMM_CFG_ADDR 0x03D7A000
+#define SDC2_TLMM_CFG_ADDR 0x03D7B000
+
#endif /* __SOC_QUALCOMM_SC7180_ADDRESS_MAP_H__ */
diff --git a/src/soc/qualcomm/sc7280/include/soc/addressmap.h b/src/soc/qualcomm/sc7280/include/soc/addressmap.h
index 6ef653375e..14c83fe7da 100644
--- a/src/soc/qualcomm/sc7280/include/soc/addressmap.h
+++ b/src/soc/qualcomm/sc7280/include/soc/addressmap.h
@@ -24,4 +24,8 @@
#define GPIO_FUNC_QSPI_DATA_1 GPIO13_FUNC_QSPI_DATA_1
#define GPIO_FUNC_QSPI_CLK GPIO14_FUNC_QSPI_CLK
+/* SDHC TLMM Registers */
+#define SDC1_TLMM_CFG_ADDR 0x0F1B3000
+#define SDC2_TLMM_CFG_ADDR 0x0F1B4000
+
#endif /* __SOC_QUALCOMM_SC7280_ADDRESS_MAP_H__ */