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authorFelix Held <felix-coreboot@felixheld.de>2023-11-16 16:06:49 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-12-19 13:11:43 +0000
commit7b9c6472179dc7a688c7728e4371d0cde0e7791a (patch)
tree672261aaacdb84e08822caaf6a17548b72867f75 /src
parent83e9f048024ab3a527d886d4591b29513c628f79 (diff)
nb/amd/pi/00730F01: assign northbridge ops in chipset devicetree
Since the northbridge is always function 0 of device 0 on bus 0, the device operations can be statically assigned in the devicetree and there's no need to bind the northbridge device operations to the PCI device during runtime via a list of PCI IDs. TEST=PC Engines APU2 still boots and doesn't show any new problems Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia7faaa468ff77e05c378c5555622c3584cfe3f81 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79104 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/amd/pi/00730F01/chipset.cb4
-rw-r--r--src/northbridge/amd/pi/00730F01/northbridge.c8
2 files changed, 4 insertions, 8 deletions
diff --git a/src/northbridge/amd/pi/00730F01/chipset.cb b/src/northbridge/amd/pi/00730F01/chipset.cb
index 40eb3ef36d..b63d9fd649 100644
--- a/src/northbridge/amd/pi/00730F01/chipset.cb
+++ b/src/northbridge/amd/pi/00730F01/chipset.cb
@@ -7,7 +7,9 @@ chip northbridge/amd/pi/00730F01
device domain 0 on
ops amd_fam16_mod30_pci_domain_ops
- device pci 0.0 alias gnb on end
+ device pci 0.0 alias gnb on
+ ops amd_pi_northbridge_ops
+ end
device pci 0.2 alias iommu off end
device pci 1.0 alias gfx off end
device pci 1.1 alias gfx_hda off end
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index be4e75adef..9fa9f2d8d8 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -633,7 +633,7 @@ static unsigned long agesa_write_acpi_tables(const struct device *device,
return current;
}
-static struct device_operations northbridge_operations = {
+struct device_operations amd_pi_northbridge_ops = {
.read_resources = nb_read_resources,
.set_resources = nb_set_resources,
.enable_resources = pci_dev_enable_resources,
@@ -643,12 +643,6 @@ static struct device_operations northbridge_operations = {
.write_acpi_tables = agesa_write_acpi_tables,
};
-static const struct pci_driver family16_northbridge __pci_driver = {
- .ops = &northbridge_operations,
- .vendor = PCI_VID_AMD,
- .device = PCI_DID_AMD_16H_MODEL_303F_NB_HT,
-};
-
static void fam16_finalize(void *chip_info)
{
struct device *dev;