diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2024-09-30 10:31:28 +0100 |
|---|---|---|
| committer | Sean Rhodes <sean@starlabs.systems> | 2024-10-11 07:48:06 +0000 |
| commit | 6e546cc695e7babb809d9555383d7c835bf045b8 (patch) | |
| tree | 40ba0f207bd937540a1053b0b12dcdda78ef7eec /src | |
| parent | 9e3f614598ae9ede85fb9cdd436ae53c62cfdefd (diff) | |
soc/intel/cannonlake: Hook up CNVi Bluetooth UPDs to devicetree
Hook up CNVi Bluetooth UPDs to the devicetree. Set CnviBtCore to
`true` so the current behaviour is not changed.
Change-Id: Ic5640c23af3ce30498be814a6d7ce56988653b25
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84596
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/cannonlake/chip.h | 6 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/chipset.cb | 3 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/chipset_pch_h.cb | 3 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/fsp_params.c | 13 |
4 files changed, 25 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index 9459b88808..d4d9d0d11d 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -409,6 +409,12 @@ struct soc_intel_cannonlake_config { uint32_t VrPowerDeliveryDesign; #endif + /* CNVi BT Core Enable/Disable */ + bool CnviBtCore; + + /* CNVi BT Audio Offload: Enable/Disable BT Audio Offload. */ + bool CnviBtAudioOffload; + /* * Override GPIO PM configuration: * 0: Use FSP default GPIO PM program, diff --git a/src/soc/intel/cannonlake/chipset.cb b/src/soc/intel/cannonlake/chipset.cb index 8c8771e139..b33aadfd32 100644 --- a/src/soc/intel/cannonlake/chipset.cb +++ b/src/soc/intel/cannonlake/chipset.cb @@ -1,6 +1,9 @@ chip soc/intel/cannonlake device cpu_cluster 0 on end + + register "CnviBtCore" = "true" + device domain 0 on device pci 00.0 alias system_agent on end # Host Bridge device pci 01.0 alias peg0 off end # PCIe x16 diff --git a/src/soc/intel/cannonlake/chipset_pch_h.cb b/src/soc/intel/cannonlake/chipset_pch_h.cb index 22e5d7a1c2..3904697b11 100644 --- a/src/soc/intel/cannonlake/chipset_pch_h.cb +++ b/src/soc/intel/cannonlake/chipset_pch_h.cb @@ -1,6 +1,9 @@ chip soc/intel/cannonlake device cpu_cluster 0 on end + + register "CnviBtCore" = "true" + device domain 0 on device pci 00.0 alias system_agent on end # Host Bridge device pci 01.0 alias peg0 off end # PCIe x16 diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index db28d41cfe..bce1eeb369 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -529,7 +529,20 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* Enable CNVi Wifi if enabled in device tree */ #if CONFIG(SOC_INTEL_COMETLAKE) + /* CNVi */ s_cfg->CnviMode = is_devfn_enabled(PCH_DEVFN_CNViWIFI); + s_cfg->CnviBtCore = config->CnviBtCore; + s_cfg->CnviBtAudioOffload = config->CnviBtAudioOffload; + + if (!s_cfg->CnviBtCore && s_cfg->CnviBtAudioOffload) { + printk(BIOS_ERR, "BT offload is enabled without CNVi BT being enabled\n"); + s_cfg->CnviBtAudioOffload = 0; + } + if (!s_cfg->CnviMode && s_cfg->CnviBtCore) { + printk(BIOS_ERR, "CNVi BT is enabled without CNVi being enabled\n"); + s_cfg->CnviBtCore = 0; + s_cfg->CnviBtAudioOffload = 0; + } #else s_cfg->PchCnviMode = is_devfn_enabled(PCH_DEVFN_CNViWIFI); #endif |