diff options
| author | Chris Zhou <chris_zhou@compal.corp-partner.google.com> | 2018-05-14 19:07:43 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-05-18 12:16:20 +0000 |
| commit | 6e09b3bde954424162ceb7a739059f9b9f38a7aa (patch) | |
| tree | 87cd3fe41fcd521d9d0f4168f14d86d70ad48b81 /src | |
| parent | a613ccd18bac2750af8583ec091aa26d8c6137fe (diff) | |
mb/google/poppy/variants/nami: Fix SoC I2C CLK is abnormal
The I2C CLKs of SoC should be 400kHz, but waveform show 460kHz to
470kHz. Add I2C parameters to adjust I2C CLKs which 5% lower than
400kHz.
BUG=b:78819970
TEST=The I2C CLKs are 5% lower than 400kHz.
Change-Id: I2c3012b5b59c089801cda8fd7b0c433aad9df36d
Signed-off-by: Chris Zhou <chris_zhou@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/26282
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Shelley Chen <shchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/poppy/variants/nami/devicetree.cb | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index f23a7fbbac..5e2575ff5a 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -197,15 +197,52 @@ chip soc/intel/skylake # Touchscreen register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" + register "i2c[0]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 185, + .scl_hcnt = 90, + .sda_hold = 36, + }, + }" # Trackpad register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" + register "i2c[1]" = "{ + .early_init = 1, + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 185, + .scl_hcnt = 90, + .sda_hold = 36, + }, + }" # Pen register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8" + register "i2c[2]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 185, + .scl_hcnt = 100, + .sda_hold = 36, + }, + }" # Audio register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8" + register "i2c[3]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 195, + .scl_hcnt = 90, + .sda_hold = 36, + }, + }" # Use GSPI0 for cr50 TPM. Early init is required to set up a BAR for TPM # communication before memory is up. |